FPGA Implementation of RVFTDNN for Digital Predistortion

被引：0
|
作者：
Huang, Hongyun [1 ]
Li, Zhipeng [1 ]
Bao, Lingfu [1 ]
机构：
[1] Univ Elect Sci & Technol China, Sch Elect Engn, Chengdu 611731, Sichuan, Peoples R China
来源：
2013 INTERNATIONAL WORKSHOP ON MICROWAVE AND MILLIMETER WAVE CIRCUITS AND SYSTEM TECHNOLOGY (MMWCST) | 2013年
关键词：
Adjacent channel power ration (ACPR); digital predistortion; field programmable gate array (FPGA); power amplifier; real-valued focused time-delay neural network (RVFTDNN); LINEARIZATION SYSTEM;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Hardware implementation of real-valued focused time-delay neural network (RVFTDNN) in FPGA for digital predistortion is presented in this paper. The predistorter implemented in field programmable gate array (FPGA) using RVFTDNN is obtained based on model inverse with indirect learning scheme and trained offline with Levenberg-Marquardt (LM) algorithm. Measurement results show that more than 10dB improvement of adjacent channel power ration (ACPR) performance of the power amplifier (PA) can be obtained for single carrier WCDMA signal.
引用
收藏
页码：464 / 467
页数：4
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