The STeTSiMS STT-RAM Simulation and Modeling System

被引:0
|
作者
Smullen, Clinton W. [1 ]
Nigam, Anurag [2 ]
Gurumurthi, Sudhanva [1 ]
Stan, Mircea R. [2 ]
机构
[1] Univ Virginia, Dept Comp Sci, Charlottesville, VA 22903 USA
[2] Univ Virginia, Dept Elect & Comp Engn, Charlottesville, VA 22903 USA
基金
美国国家科学基金会;
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
There is growing interest in emerging non-volatile memory technologies such as Phase-Change Memory, Memristors, and Spin-Transfer Torque RAM (STT-RAM). STT-RAM, in particular, is experiencing rapid development that can be difficult for memory systems researchers to take advantage of. What is needed are techniques that enable designers to explore the potential of recent STT-RAM designs and adjust the performance without needing a detailed understanding of the physics. In this paper, we present the STeTSiMS STT-RAM Simulation and Modeling System to assist memory systems researchers. After providing background on the operation of STT-RAM magnetic tunnel junctions (MTJs), we demonstrate how to fit three different published MTJ models to our model and normalize their characteristics with respect to common metrics. The high-speed switching behavior of the designs is evaluated using macromagnetic simulations. We have also added a first-order model for STT-RAM memory arrays to the CACTI memory modeling tool, which we then use to evaluate the performance, energy consumption, and area for: (i) a high-performance cache, (ii) a high-capacity cache, and (iii) a high-density memory.
引用
收藏
页码:318 / 325
页数:8
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