Process equipment readiness for through-silicon via technologies

被引：1
|
作者：
Ramaswami, Sesh [1 ]
机构：
[1] Appl Mat Inc, Strategy Silicon Syst Grp, Santa Clara, CA 95054 USA
来源：
SOLID STATE TECHNOLOGY | 2010年 / 53卷 / 08期
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Leading-edge applications are employing through silicon vias (TSVs) to satisfy the demand for devices to deliver more functionality faster in smaller dimensions, especially as consumer electronics become increasingly complex, compact, and energy efficient. In homogeneous or heterogeneous integration, similar or different chips are stacked top of each other and joined by vertical interconnects. Today, unit processes are ready and integration is well advanced, with "best known methods" for typical interposer, via middle, and via last flows ready for limited pilot production at several locations.
引用
收藏
页码：16 / 17
页数：2
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