Design and implementation of stochastic neurosystem using SFQ logic circuits.

被引：12

作者：

Kondo, T ^{[1
]}

Kobori, M ^{[1
]}

Onomi, T ^{[1
]}

Nakajima, K ^{[1
]}

机构：

[1] Tohoku Univ, RIEC, Elect Commun Res Inst, Intelligent Nanointegrat Syst Lab Brainware Syst, Sendai, Miyagi 9808577, Japan

来源：

IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY | 2005年 / 15卷 / 02期

关键词：

neural network; single flux quantum; stochastic logic; up/down counter;

D O I：

10.1109/TASC.2005.849818

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose a stochastic neurosystem using SFQ logic circuits and design the main components with the following functions: carrying out the multiplication of an input to a neuron on a synaptic weight value, integrating pulses to generate a membrane potential, and generating the output of a neuron. We simulate some circuits by JSIM and confirm their correct operation. We-compare two methods of multipliers: using a comparator and using a divider. The multiplication using the divider is effective with respect to integration, and reduces the accumulation time N-a required for higher precision operations. We designed a 4-bit up/down counter assuming the NEC 2.5 kA/cm(2) Nb/AlOx/Nb standard process. We show that it is possible to compose the activation function circuit using a comparator.

引用

页码：320 / 323

页数：4

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