A 0.8V CMOS Bandgap Voltage Reference Design

被引:0
|
作者
Zhang, Bolun [1 ]
Cui, Xiaole [1 ]
Zhang, Yifan [1 ]
Yang, Chun [1 ]
Xiao, Ying [1 ]
Lin, Xinnan [1 ]
机构
[1] Peking Univ, Shenzhen Grad Sch, Key Lab Integrated Microsyst, Shenzhen 518055, Guangdong, Peoples R China
关键词
bandgap reference; low voltage; temperature compensation;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A low-voltage bandgap reference implemented in 0.18 mu m CMOS process is designed. The bandgap reference circuit is optimized by adjusting the ratio of the resistors, and reducing the working voltage of operational amplifier. It achieves the performance of a temperature coefficient of 25 ppm/degrees C in the range of 0 similar to 100 degrees C which works under the voltage of 0.8V. The simulated power supply rejection ratio is 46.3dB @1Hz and the line regulation is 1.5mV/V in the range from 0.8V to 1.8V.
引用
收藏
页码:356 / 359
页数:4
相关论文
共 50 条
  • [21] Curvature-compensated CMOS bandgap circuit with 1 V reference voltage
    Stanescu, C
    Iacob, R
    Caracas, C
    Cosmin, P
    CAS: 2002 INTERNATIONAL SEMICONDUCTOR CONFERENCE, VOLS 1 AND 2, PROCEEDINGS, 2001, : 365 - 368
  • [22] 0.8V High Performance OTA Using Flipped Voltage Follower
    Kumar, Ahlad
    JOURNAL OF ACTIVE AND PASSIVE ELECTRONIC DEVICES, 2013, 8 (01): : 1 - 17
  • [23] A 3 to 5V CMOS bandgap voltage reference with novel trimming
    Gupta, S
    Black, W
    PROCEEDINGS OF THE 39TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III, 1996, : 969 - 972
  • [25] A 0.8V, 37nW, 42ppm/°C Sub-Bandgap Voltage Reference with PSRR of-81dB and Line Sensitivity of 51ppm/V in 0.18um CMOS
    Kim, Myungjun
    Cho, SeongHwan
    2017 SYMPOSIUM ON VLSI CIRCUITS, 2017, : C144 - C145
  • [26] A very low-voltage (0.8V) CMOS receiver frontend for 5GHz RF applications
    Lee, KH
    El-Gamal, MN
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I, PROCEEDINGS, 2002, : 125 - 128
  • [27] A Low Voltage 0.8V RF Receiver in 28nm CMOS for 5GHz WLAN
    Shirane, Atsushi
    Kawai, Shusuke
    Aoyama, Hiromitsu
    Ito, Rui
    Mitomo, Toshiya
    Kobayashi, Hiroyuki
    Yoshida, Hiroshi
    Majima, Hideaki
    Fujimoto, Ryuichi
    Tsurumi, Hiroshi
    ESSCIRC 2017 - 43RD IEEE EUROPEAN SOLID STATE CIRCUITS CONFERENCE, 2017, : 328 - 331
  • [28] Sub 1 V CMOS bandgap reference design techniques: a survey
    Fayomi, Christian Jesus B.
    Wirth, Gilson I.
    Achigui, Herve Facpong
    Matsuzawa, Akira
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2010, 62 (02) : 141 - 157
  • [29] Sub 1 V CMOS bandgap reference design techniques: a survey
    Christian Jésus B. Fayomi
    Gilson I. Wirth
    Hervé Facpong Achigui
    Akira Matsuzawa
    Analog Integrated Circuits and Signal Processing, 2010, 62 : 141 - 157
  • [30] LOW-VOLTAGE CMOS BANDGAP REFERENCE
    VITTOZ, EA
    NEYROUD, O
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (03) : 573 - 577