Verification and Validation Methods for a Trust-by-Design Framework for the IoT

被引:1
|
作者
Ferraris, Davide [1 ]
Fernandez-Gago, Carmen [1 ]
Lopez, Javier [1 ]
机构
[1] Univ Malaga, Network Informat & Comp Secur Lab, Malaga 29071, Spain
关键词
Trust; SysML; UML; Internet of Things (IoT); System Development Life Cycle (SDLC); INTERNET;
D O I
10.1007/978-3-031-10684-2_11
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The development of an Internet of Things (IoT) entity is a difficult process that can be performed following a System Development Life Cycle (SDLC). Two important phases of a SDLC process are verification and validation (V&V). Moreover, if we want to guarantee that trust is considered through the SDLC we have to implement it since the first phases and verify and validate its implementation during V&V. Verification usually is defined as "the system has been built right", on the other hand validation refers to the fact that "the right system has been built". Concerning trust, following our methodologies we can state that we can verify that "the trusted IoT entity has been built" and validate that "the right trusted IoT entity has been built". In this paper, we propose a methodology to verify and validate requirements related to a trusted IoT entity. Following the methodology, it is possible to check if the requirements elicited in the early phases of the SDLC have been implemented in the developed functionalities. These final phases will be fundamental in order to achieve trust in the developed IoT entity.
引用
收藏
页码:183 / 194
页数:12
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