A Hybrid Photonic-Electronic Switching Architecture for Next Generation Datacenters

被引:1
|
作者
Bernier, Eric [1 ]
Mehrvar, Hamid [1 ]
Kiaei, Mohammad [1 ]
Ma, Huixiao [2 ]
Yang, Xiaoling [2 ]
Wang, Yan [2 ]
Li, Shuaibing [2 ]
Graves, Alan [1 ]
Wang, Dawei [2 ]
Fu, H. Y. [2 ]
Geng, Dongyu [2 ]
Goodwill, Dominic [1 ]
机构
[1] Huawei Technol Canada Co Ltd, Ottawa, ON K2K 3J1, Canada
[2] Huawei Technol Co Ltd, Commun Tech Lab, Shenzhen 518129, Peoples R China
来源
SILICON PHOTONICS X | 2015年 / 9367卷
关键词
Photonic switch; packet switching; datacenter architecture;
D O I
10.1117/12.2177686
中图分类号
O43 [光学];
学科分类号
070207 ; 0803 ;
摘要
We provide an alternative architecture for the next generation datacenters by employing electronic and photonic switching cores. The capacity of electronic packet switching (EPS) cores is not enough for the bandwidth requirements of next generation datacenters. On the other hand, it is prohibitively costly to build pure photonic packet switching (OPS) core which is capable of switching native Ethernet frames in nanoseconds. We propose a low-cost hybrid OPS/ EPS platform which significantly increases the switching capacity of datacenters for all traffic patterns while using the existing EPS cores. Our proposed architecture is a fat-tree hierarchy consisting of servers, top-of-racks (TOR), aggregation switches, and core switches. The aggregation switches are interconnected to the core hybrid OPS/ EPS switch. Since the traffic inside datacenters is typically bimodal, the hybrid switch core becomes feasible by switching short and long packets using EPS and OPS cores, respectively. In order to prepare long packets for photonic switching, they undergo packet contention resolution, compression, and bitwise scrambling. Afterwards, a photonic destination label is added to the long packets, and they are sent out through an optical transmitter. For compressing the long packets, the clock rate is raised on the output of the physical layer. Packet compression increases inter-packet gap to insert the photonic label. Also, it provides more time for photonic switch connection set-up and receiver synchronization at the destination aggregation switch. We developed a test bed for our architecture and used it to transmit real-time traffic. Our experiments show successful transmission of all packets through OPS.
引用
收藏
页数:6
相关论文
共 50 条
  • [41] Advanced Electronic Architecture Design for Next Electric Vehicle Generation
    Vermesan, Ovidiu
    Sans, Mariano
    Hank, Peter
    Farrall, Glenn
    Packer, Jamie
    Cesario, Nicola
    Gall, Harald
    Blystad, Lars-Cyril
    Sciolla, Michele
    Harrar, Ahmed
    ELECTRIC VEHICLE SYSTEMS ARCHITECTURE AND STANDARDIZATION NEEDS: REPORTS OF THE PPP EUROPEAN GREEN VEHICLES INITIATIVE, 2015, : 117 - 141
  • [42] 4 × 112 Gb/s hybrid integrated silicon receiver based on photonic-electronic co-design
    金烨
    谢毓俊
    张郅涵
    陆东来
    杨梦涵
    李昂
    孟祥彦
    屈扬
    李乐良
    石暖暖
    李伟
    祝宁华
    祁楠
    李明
    Chinese Optics Letters, 2024, 22 (08) : 111 - 117
  • [43] Hybrid Transition Mechanism for MILSA Architecture for the Next Generation Internet
    Pan, Jianli
    Paul, Subharthi
    Jain, Raj
    Xu, Xiaohu
    2009 IEEE GLOBECOM WORKSHOPS, 2009, : 532 - +
  • [44] LIGHTNING: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference
    Zhong, Zhizhen
    Yang, Mingran
    Lang, Jay
    Williams, Christian
    Kronman, Liam
    Sludds, Alexander
    Esfahanizadeh, Homa
    Englund, Dirk
    Ghobadi, Manya
    PROCEEDINGS OF THE 2023 ACM SIGCOMM 2023 CONFERENCE, SIGCOMM 2023, 2023, : 452 - 472
  • [45] Silicon integrated photonic-electronic neuron for noise-resilient deep learning
    Roumpos, Ioannis
    de Marinis, Lorenzo
    Kovaios, Stefanos
    Kincaid, Peter Seigo
    Paolini, Emilio
    Tsakyridis, Apostolos
    Moralis-Pegios, Miltiadis
    Berciano, Mathias
    Ferraro, Filippo
    Bode, Dieter
    Srinivasan, Srinivasan Ashwyn
    Pantouvaki, Marianna
    Andriolli, Nicola
    Contestabile, Giampiero
    Pleros, Nikos
    Vyrsokinos, Konstantinos
    OPTICS EXPRESS, 2024, 32 (20): : 34264 - 34274
  • [46] 4 x 112 Gb/s hybrid integrated silicon receiver based on photonic-electronic co-design
    Jin, Ye
    Xie, Yujun
    Zhang, Zhihan
    Lu, Donglai
    Yang, Menghan
    Li, Ang
    Meng, Xiangyan
    Qu, Yang
    Li, Leliang
    Shi, Nuannuan
    Li, Wei
    Zhu, Ninghua
    Qi, Nan
    Li, Ming
    CHINESE OPTICS LETTERS, 2024, 22 (08)
  • [47] Photonic-Electronic Integrated Circuits for High-Performance Computing and AI Accelerators
    Ning, Shupeng
    Zhu, Hanqing
    Feng, Chenghao
    Gu, Jiaqi
    Jiang, Zhixing
    Ying, Zhoufeng
    Midkiff, Jason
    Jain, Sourabh
    Hlaing, May H.
    Pan, David Z.
    Chen, Ray T.
    JOURNAL OF LIGHTWAVE TECHNOLOGY, 2024, 42 (22) : 7834 - 7859
  • [48] An efficient packet switching architecture for next-generation military satellite networks
    Landry, R
    Scher, D
    Burdin, J
    Chen, P
    MILCOM 2003 - 2003 IEEE MILITARY COMMUNICATIONS CONFERENCE, VOLS 1 AND 2, 2003, : 268 - 273
  • [49] Next Generation Connectionless IP router architecture with Switching Delay for URLLC Services
    Ueno, Yoichiro
    Tsukahara, Akihiko
    Miyaho, Noriharu
    2023 IEEE 24TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE SWITCHING AND ROUTING, HPSR, 2023,
  • [50] Single-longitudinal-mode, narrow-linewidth oscillation from a high-Q photonic-electronic hybrid cavity
    张梓平
    戴一堂
    尹飞飞
    欧攀
    周月
    李建强
    徐坤
    ChineseOpticsLetters, 2017, 15 (01) : 49 - 53