Reliability risk assessment of organic flip chip pin grid array package under thermal and mechanical loading conditions

被引:0
|
作者
Goh, TJ [1 ]
机构
[1] Intel Prod M Sdn Bhd, Assembly Technol Dev Malaysia, Kulim 09100, Malaysia
关键词
flip chip interconnection; deformation; thermal and mechanical loading conditions;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The silicon die of an organic flip chip assembly is exposed to external mechanical loads during component testing and heat sink attachment These loads can potentially cause package to flexure and may eventually lead to severe damage in the die and package. A comprehensive evaluation has been conducted to determine the maximum loading limit of organic flip chip assembly through design of experiment (DOE) approach. A material testing system has been utilized to simulate various loading conditions (ranging from 15 lb. to 200 lb.) on organic flip-chip test vehicles (FTV) during heat sink attachment. The effects of permanent mechanical loading and thermal cyclic loading on the reliability of FTV structures are also investigated in this study. Three-dimensional finite element models (FEM) of FTV have been employed to aid in understanding the mechanical behavior of silicon die and organic substrate under both loading conditions. Shadow Moire technique has been used to measure the out-of-plane residual deformation of the FTV that underwent simulated loading conditions. These components were then visually inspected and tested functionally. Results were summarized and used as indicator of package reliability.
引用
收藏
页码:293 / 301
页数:9
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