Architecture Design of Belief Propagation for Real-Time Disparity Estimation

被引:3
|
作者
Tseng, Yu-Cheng [1 ]
Chang, Tian-Sheuan [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 30010, Taiwan
关键词
Belief propagation; disparity estimation;
D O I
10.1109/TCSVT.2010.2087434
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Belief propagation based algorithms perform best in disparity estimation but suffer from high computational complexity and storage, especially in message passing. This paper proposes an efficient architecture design with three techniques to solve the problems. For the memory storage, we propose the spinning-message and the sliding-bipartite node plane that can reduce memory cost to 1.2% for image-scale algorithms and 23.4% for block-scale algorithms, when compared to the traditional approach. For the logic complexity, we propose a buffer-free processing element architecture that has 3.6 times hardware efficiency of the previous work. The three proposed techniques could be applied to various belief propagation based algorithms to save significant hardware cost as well as approach real-time speed.
引用
收藏
页码:1555 / 1564
页数:10
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