A real-time full architecture for AVS motion estimation

被引:1
|
作者
Deng, Lei [1 ]
Xie, Xiao Dong [1 ]
Gao, Wen [1 ]
机构
[1] Peking Univ, Sch Elect Engn & Comp Sci, Beijing 100871, Peoples R China
关键词
AVS; symmetric match; VBSME; systolic;
D O I
10.1109/TCE.2007.4429279
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In the advanced audio video coding standard (A VS), the motion estimation employs many new techniques such as variable block size, multiple reference frames, motion vector prediction, symmetric searching, etc, for high coding efficiency. However, these techniques are so complex for hardware implementation due to their high data dependence and high computation requirement. In this paper, we firstly improved the A VS motion estimation algorithm from the viewpoint of hardware implementation and secondly propose the architecture for the improved algorithm. This architecture has two 2-D systolic arrays and fully supports the A VS variable block size match. It is able to process forward, backward and symmetric prediction concurrently, and totally produces 27 motion vectors for each macro-block. Experimental results shows that the architecture can achieve 29 fps under the condition of two reference pictures, 65x65 search range and 720x576 picture size.
引用
收藏
页码:1744 / 1751
页数:8
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