Thermal characterization of a double-gate silicon-on-insulator MOSFET

被引：8
|
作者：
Pandey, MK [1 ]
Sen, S [1 ]
Gupta, RS [1 ]
机构：
[1] Univ Delhi, Dept Elect Sci, Semicond Device Res Lab, New Delhi 110021, India
来源：
JOURNAL OF PHYSICS D-APPLIED PHYSICS | 1999年 / 32卷 / 03期
关键词：
D O I：
10.1088/0022-3727/32/3/023
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
A two-dimensional analytical model to study the behaviour of the device parameters in various temperature ranges is developed. The temperature dependences of the threshold voltage, drain current and channel transconductance are modelled using temperature-sensitive parameters. The effects of temperature on the cut-off frequency and channel-transit time are also discussed. The results so obtained are compared with the experimental data for a single-gate silicon-on-insulator MOSFET.
引用
收藏
页码：344 / 349
页数：6
相关论文
共 50 条
  • [1] Thermal characterization of a double-gate silicon-on-insulator MOSFET
    Pandey, Manoj K.
    Sen, Sujata
    Gupta, R.S.
    Journal of Physics D: Applied Physics, 32 (03): : 344 - 349
  • [2] Velocity overshoot in ultrathin double-gate silicon-on-insulator transistors
    Gámiz, F
    APPLIED PHYSICS LETTERS, 2004, 84 (02) : 299 - 301
  • [3] High-voltage, double-gate devices on silicon-on-insulator
    Zingg, RP
    MICROELECTRONIC ENGINEERING, 2001, 59 (1-4) : 461 - 468
  • [4] Ferroelectric Junctionless Double-Gate Silicon-On-Insulator FET as a Tripartite Synapse
    Gastaldi, C.
    Kamaei, S.
    Cavalieri, M.
    Saeidi, A.
    Stolichnov, I.
    Radu, I.
    Ionescu, A. M.
    IEEE ELECTRON DEVICE LETTERS, 2023, 44 (04) : 678 - 681
  • [5] Quantum Transport in Silicon Double-Gate MOSFET
    Lamba, V.
    Engles, D.
    Malik, S. S.
    Verma, M.
    2009 2ND INTERNATIONAL WORKSHOP ON ELECTRON DEVICES AND SEMICONDUCTOR TECHNOLOGY, 2009, : 55 - +
  • [6] Monte Carlo simulation of double-gate silicon-on-insulator inversion layers: The role of volume inversion
    1600, American Institute of Physics Inc. (89):
  • [7] Gate bias symmetry dependency of electron mobility and prospect of velocity modulation in double-gate silicon-on-insulator transistors
    Prunnila, M
    Ahopelto, J
    Henttinen, K
    Gamiz, F
    APPLIED PHYSICS LETTERS, 2004, 85 (22) : 5442 - 5444
  • [8] DOUBLE-GATE SILICON-ON-INSULATOR TRANSISTOR WITH VOLUME INVERSION - A NEW DEVICE WITH GREATLY ENHANCED PERFORMANCE
    BALESTRA, F
    CRISTOLOVEANU, S
    BENACHIR, M
    BRINI, J
    ELEWA, T
    IEEE ELECTRON DEVICE LETTERS, 1987, 8 (09) : 410 - 412
  • [9] Monte Carlo simulation of double-gate silicon-on-insulator inversion layers: The role of volume inversion
    Gamiz, F
    Fischetti, MV
    JOURNAL OF APPLIED PHYSICS, 2001, 89 (10) : 5478 - 5487
  • [10] Impact of carrier quantum confinement on the short channel effects of double-gate silicon-on-insulator FINFETs
    Medury, Aditya Sankar
    Bhat, K. N.
    Bhat, Navakanta
    MICROELECTRONICS JOURNAL, 2016, 55 : 143 - 151
12345