Transistor Level Modeling for Circuit Simulation

被引：0

作者：

Gao Jin ^{[1
]}

Duan Zhe-min ^{[1
]}

Yin Xi-peng ^{[1
]}

Gao Wei ^{[1
]}

机构：

[1] Northwestern Polytech Univ, Sch Elect & Informat, Xian 710072, Peoples R China

来源：

PROCEEDINGS OF THE 2012 INTERNATIONAL CONFERENCE ON COMMUNICATION, ELECTRONICS AND AUTOMATION ENGINEERING | 2013年 / 181卷

关键词：

Transistor Level Modeling; VHDL-AMS; Circuit Simulation;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

During the development of servo system, there are some problems in circuit simulation, particularly at the transistor level. One way of solving this problem is to use a consistent modeling and simulation framework that allows for the description of systems from different disciplines and for the description of interactions between these systems. To find the advantage of the VHDL-AMS language for analog system, this modeling method is also effective to describe the mixed-signal system's structure and action.

引用

页码：513 / 517

页数：5

共 50 条

[21] CIRCUIT SIMULATION AND MODELING
YANG, P
IEEE CIRCUITS & DEVICES, 1990, 6 (02): : 8 - 10
[22] A scalable bipolar transistor model for circuit simulation
Yuan, JS
Dai, Y
Yeh, CS
PHYSICA STATUS SOLIDI A-APPLIED RESEARCH, 1998, 168 (01): : 209 - 222
[23] Gate-Level Modeling for CMOS Circuit Simulation with Ultimate FinFETs
Chevillon, Nicolas
Madec, Morgan
Lallement, Christophe
PROCEEDINGS OF THE 2012 IEEE/ACM INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURES (NANOARCH), 2012, : 22 - 29
[24] Compact Modeling and Circuit-Level Simulation of Silicon Nanophotonic Interconnects
Wu, Rui
Wang, Yuyang
Zhang, Zeyu
Zhang, Chong
Schow, Clint L.
Bowers, John E.
Cheng, Kwang-Ting
PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2017, : 602 - 605
[25] Circuit-level simulation of transistor lasers and its application to modelling of microwave photonic links
Iezekiel, Stavros
Christou, Andreas
PHYSICS AND SIMULATION OF OPTOELECTRONIC DEVICES XXIII, 2015, 9357
[26] Efficient Transistor-Level Symbolic Timing Simulation Using Cached Partial Circuit States
McDonald, Clayton B.
Chou, Hsinwei
Durairaj, Vijay
Lin, Pey-Chang Kent
2015 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2015, : 802 - 807
[27] Behavioral Model of Silicon Photo-Multipliers Suitable for Transistor-Level Circuit Simulation
Giustolisi, Gianluca
Finocchiaro, Paolo
Pappalardo, Alfio
Palumbo, Gaetano
ELECTRONICS, 2021, 10 (13)
[28] Modeling and simulation of carbon nanotube field effect transistor and its circuit application附视频
Amandeep Singh
Dinesh Kumar Saini
Dinesh Agarwal
Sajal Aggarwal
Mamta Khosla
Balwinder Raj
Journal of Semiconductors, 2016, (07) : 39 - 44
[29] Fast Monte Carlo Estimation of Timing Yield With Importance Sampling and Transistor-Level Circuit Simulation
Bayrakci, Alp Arslan
Demir, Alper
Tasiran, Serdar
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2010, 29 (09) : 1328 - 1341
[30] A Circuit-Level SPICE Modeling Strategy for the Simulation of Behavioral Variability in ReRAM
Cayo, Jose
Vourkas, Ioannis
Rubio, Antonio
PROCEEDINGS OF THE 2022 IFIP/IEEE 30TH INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC), 2022,

← 1 2 3 4 5 →