Electrical Design and Performance of a Multichip Module on a Silicon Interposer

被引:0
|
作者
Baez, Franklin M. [1 ]
Cranmer, Mike
Shapiro, Mike
Audet, Jean
Berger, Dan
Sprogis, Ed
Collins, Chris
Iyer, Subramania
机构
[1] IBM Corp, Syst & Technol Grp, Worldwide Packaging Dept, 2070 Route 52, East Fishkill, NY 12533 USA
来源
2012 IEEE 21ST CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS | 2012年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A multichip module package has been designed in IBM's silicon technology. The module consists of two chips of same size and type communicating horizontally through a silicon interposer to a large ASIC chip. The chip to chip links operate at 8 Gbps with a loss of 0.5 dB/mm and reflections < 20 dB. All links are skew matched to within 2 ps. Model to hardware correlation was performed and trace loss is within 0.1 dB of modeling data. The input to the module consists of a high speed RF signal and the module was optimized for board to package transition. Outputs of the module are 15Gbps high speed links. Both input and output signals go up or down a through silicon via (TSV) in the silicon interposer as part of their electrical paths. TSV parameters do not limit the electrical performance of the module.
引用
收藏
页码:303 / 306
页数:4
相关论文
共 50 条
  • [31] Temperature dependence of pixel multichip module operating performance
    Turqueti, MA
    Appel, JA
    Christian, DC
    Cihangir, S
    Hall, BK
    Kwan, S
    Zimmermann, S
    2003 IEEE NUCLEAR SCIENCE SYMPOSIUM, CONFERENCE RECORD, VOLS 1-5, 2004, : 581 - 585
  • [32] Design-for-test in a multiple substrate multichip module
    Jorgenson, JA
    Wagner, RJ
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 1997, 10 (1-2): : 97 - 108
  • [33] A multichip module solution for high performance ATM switching
    Licciardi, L
    Peretti, M
    Pilati, L
    Ichai, JJ
    Martin, F
    Urena, PY
    1996 IEEE MULTI-CHIP MODULE CONFERENCE, PROCEEDINGS, 1996, : 10 - 15
  • [34] SILICON INTERPOSER FEATURING NOVEL ELECTRICAL AND OPTICAL TSVS
    Thadesar, Paragkumar A.
    Bakir, Muhannad S.
    INTERNATIONAL MECHANICAL ENGINEERING CONGRESS AND EXPOSITION - 2012, VOL 9, PTS A AND B, 2013, : 405 - 412
  • [35] Accurate Electrical Simulation and Design Optimization for Silicon Interposer Considering the MOS Effect and Eddy Currents in the Silicon Substrate
    Zhou, Jing
    Wan, Lixi
    Dai, Fengwei
    Wang, Huijuan
    Song, Chongshen
    Du, Tianmin
    Chu, Yanbiao
    Pan, Maoyun
    Guidotti, Daniel
    Cao, Liqiang
    Yu, Daquan
    2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 658 - 664
  • [36] MULTICHIP MODULE DESIGNS FOR HIGH-PERFORMANCE APPLICATIONS
    NEUGEBAUER, C
    CARLSON, RO
    FILLION, RA
    HALLER, TR
    PROCEEDINGS OF THE TECHNICAL CONFERENCE : EIGHTH ANNUAL INTERNATIONAL ELECTRONICS PACKAGING CONFERENCE, 1988, : 163 - 173
  • [37] Design Elements and Electrical Performance of a Bifacial BIPV Module
    Kang, Jun-Gu
    Kim, Jin-Hee
    Kim, Jun-Tae
    INTERNATIONAL JOURNAL OF PHOTOENERGY, 2016, 2016
  • [38] MULTICHIP MODULE TESTING
    KESSLER, J
    KREISL, F
    PFLUG, G
    RAUH, H
    TANNHAUSER, R
    SIEMENS FORSCHUNGS-UND ENTWICKLUNGSBERICHTE-SIEMENS RESEARCH AND DEVELOPMENT REPORTS, 1988, 17 (05): : 259 - 262
  • [39] Multichip module substrates
    Blum, NA
    Charles, HK
    Francomacaro, AS
    JOHNS HOPKINS APL TECHNICAL DIGEST, 1999, 20 (01): : 62 - 69
  • [40] Multichip module substrates
    Blum, Norman A.
    Charles Jr., Harry K.
    Francomacaro, A.Shaun
    Johns Hopkins APL Technical Digest (Applied Physics Laboratory), 1999, 20 (01): : 62 - 69