Design of Direct Digital Frequency Synthesizer with the Technique of Segmenting in Quarter Wave Symmetry

被引：0

作者：

Karpagavalli, S. ^{[1
]}

Hariharan, K. ^{[1
]}

Dheivanai, G. ^{[1
]}

Gurupriya, M. ^{[1
]}

机构：

[1] Thiagarajar Coll Engn, ECE Dept, Madurai, Tamil Nadu, India

来源：

INTERNATIONAL CONFERENCE ON COMPUTER NETWORKS AND COMMUNICATION TECHNOLOGIES (ICCNCT 2018) | 2019年 / 15卷

关键词：

DDFS architecture; Read only memory; Spectral purity; ROM compression; Signal-to-noise ratio; Spurious free dynamic range; Spectrum;

D O I：

10.1007/978-981-10-8681-6_42

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In recent communication systems, Direct Digital Frequency Synthesizer (DDFS) plays dominant role in signal generation. DDFS is highly stable and highly controllable circuitry. DDFS requires read only memory (ROM) for signal generation, but usage of high ROM size leads to high power consumption and more hardware requirements. In this paper, on utilizing a quarter wave symmetry technique and storing the difference value between consecutive segments in ROM Look-up table (LUT) is proposed. The proposed architecture has reduced ROM size with beneficial effects in terms of speed and power. For 8-bit resolution SNR is of 44.92 dB and SFDR is of 50.64 dBc.

引用

页码：469 / 477

页数：9

共 50 条

[41] Frequency Synthesizer Architectural Design for Digital Radar Testbed
AlRifai, Hani
Dhaouadi, Sirine
Hatahet, Yamen
Almabrouk, Fares
Albasha, Lutfi
Mir, Hasan
2017 7TH INTERNATIONAL CONFERENCE ON MODELING, SIMULATION, AND APPLIED OPTIMIZATION (ICMSAO), 2017,
[42] Quadrature direct digital frequency synthesizer with high compression ratio
Zhao Zhanfeng
Zhou Zhiquan
Qiao Xiaolin
2006 10TH INTERNATIONAL CONFERENCE ON COMMUNICATION TECHNOLOGY, VOLS 1 AND 2, PROCEEDINGS, 2006, : 679 - +
[43] A new Direct Digital Frequency Synthesizer architecture for mobile transceivers
Hegazi, EM
Ragaie, HF
Haddara, H
Ghali, H
ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, 1998, : B647 - B650
[44] A direct digital frequency synthesizer based on ROM free algorithm
Yi, Shu-Chung
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2010, 64 (11) : 1068 - 1072
[45] Direct digital frequency synthesizer architecture based on Chebyshev approximation
Palomäki, KI
Niittylahti, J
CONFERENCE RECORD OF THE THIRTY-FOURTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, 2000, : 1639 - 1643
[46] Arbitrary waveform generator based on direct digital frequency synthesizer
Hu, Weibo
Lee, Chung Len
Wang, Xin'an
DELTA 2008: FOURTH IEEE INTERNATIONAL SYMPOSIUM ON ELECTRONIC DESIGN, TEST AND APPLICATIONS, PROCEEDINGS, 2008, : 567 - +
[47] A Compact Direct Digital Frequency Synthesizer for System-on-chip
Cao Xiaodong
Ni Weining
Yuan Ling
Hao Zhikun
Shi Yin
2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 1855 - 1858
[48] Principles of Construction of Structural Units for Direct Digital Frequency Synthesizer
Polikarovskih, O.
Kovtun, L.
Karpova, L.
2018 14TH INTERNATIONAL CONFERENCE ON ADVANCED TRENDS IN RADIOELECTRONICS, TELECOMMUNICATIONS AND COMPUTER ENGINEERING (TCSET), 2018, : 1205 - 1208
[49] SOME PROBLEMS IN DIGITAL FREQUENCY-SYNTHESIZER DESIGN
LEVIN, VA
NISNEVICH, DG
TELECOMMUNICATIONS AND RADIO ENGINEERING, 1976, 30 (04) : 44 - 50
[50] High-SFDR and Multiplierless Direct Digital Frequency Synthesizer
Sung, Tze-Yun
Hsin, Hsi-Chin
Ko, Lyu-Ting
PROCEEDINGS OF THE 8TH WSEAS INTERNATIONAL CONFERENCE ON INSTRUMENTATION, MEASUREMENT, CIRCUITS AND SYSTEMS: INSTRUMENTATION, MEASUREMENT, ELECTRONICS, CIRCUITS AND SYSTEMS, 2009, : 41 - +

← 1 2 3 4 5 →