Three-phase time-aware energy minimization with DVFS and unrolling for Chip Multiprocessors

被引：100

作者：

Qiu, Meikang ^{[2
]}

Ming, Zhong ^{[1
]}

Li, Jiayin ^{[2
]}

Liu, Shaobo ^{[3
]}

Wang, Bin ^{[4
]}

Lu, Zhonghai ^{[5
]}

机构：

[1] Shenzhen Univ, Coll Comp Sci & Software Engr, Shenzhen 518060, GD, Peoples R China

[2] Univ Kentucky, Dept Elec & Comp Engr, Lexington, KY 40506 USA

[3] Marvell Semicond, Marlborough, MA 01752 USA

[4] Wright State Univ, Dept Comp Sci & Engr, Dayton, OH 45435 USA

[5] KTH Royal Inst Technol, Sch ICT, Dept Elect Syst, Stockholm, Sweden

来源：

JOURNAL OF SYSTEMS ARCHITECTURE | 2012年 / 58卷 / 10期

关键词：

Real-time; CMP; Energy; DVFS; Task graph; Unrolling; SELECTION; SYSTEMS;

D O I：

10.1016/j.sysarc.2012.07.001

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Energy consumption has been one of the most critical issues in the Chip Multiprocessor (CMP). Using the Dynamic Voltage and Frequency Scaling (DVFS), a CMP system can achieve a balance between the performance and the energy-efficiency. In this paper, we propose a three-phase discrete DVFS algorithm for a CMP system dedicated to applications where the period of the applications' task graph is smaller than the deadline of tasks. In these applications, multiple task graphs are unrolled and then concatenated together to form a new task graph. The proposed DVFS algorithm is applied to the newly formed task graph to stretch tasks' execution time, lower operating frequencies of processors and achieve the system power efficiency. Experimental results show that the proposed algorithm reduces the energy dissipation by 25% on average, compared to previous DVFS approaches. (C) 2012 Elsevier B.V. All rights reserved.

引用

页码：439 / 445

页数：7

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