Scan-Controlled Pulse Flip-Flops for Mobile Application Processors

被引：0

作者：

Kim, Min-su ^{[1
]}

Lee, HyoungWook ^{[1
]}

Park, Jin-Soo ^{[1
]}

Kim, Chung-Hee ^{[1
]}

Kang, Juhyun ^{[1
]}

Shin, Ken ^{[1
]}

Kagramanyan, Emil ^{[1
]}

Jung, Gunok ^{[1
]}

Cho, Ukrae ^{[1
]}

Shin, Youngmin ^{[1
]}

Son, Jae Cheol ^{[1
]}

机构：

[1] Samsung Elect, Yongin 449711, Kyunggi Do, South Korea

来源：

2013 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2013年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Novel high-speed low-power pulse-based flip-flops having a pulse generator controlled by scan input and scan enable signals are presented. The proposed scheme enables the reduction of data-to-output delay by elimination of the MUX-scan logic from the setup time path of flip-flop, at the cost of a small power overhead. The comparison results using the 45 nm CMOS process indicate that the worst-case DQ delay of the proposed flip-flop is reduced by up to 59% while the energy-delay product is improved by up to 80% compared to the conventional master-slave flip-flop. The silicon results show that the new flip-flops function properly down to 0.62 V.

引用

页码：769 / 772

页数：4

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