A novel area-efficient MOSFET-C filter design methodology

被引：0
|
作者：
Takagi, S
Wada, K
Fujii, N
Ismail, M
Kim, DY
机构：
来源：
APCCAS '96 - IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS '96 | 1996年
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暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper proposes a novel area-efficient and cost-effective design methodology for MOSFET-C continuous-time filters. The new methodology reduces the number of MOS transistors used in the previously reported work[5] by almost a factor of two. A third-order leapfrog low-pass chebyschev filter is realised and simulated as an example to demonstrate the validity of the new design methodology.
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页码：53 / 56
页数：4
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