Testing embedded-core-based system chips

被引:123
|
作者
Zorian, Y
Marinissen, EJ
Dey, S
机构
[1] LogicVision Inc, San Jose, CA 95110 USA
[2] Philips Res Labs, Eindhoven, Netherlands
[3] Univ Calif San Diego, ECE Dept, San Diego, CA 92103 USA
关键词
D O I
10.1109/2.769444
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Recently, designers have been embedding reusable modules to build on-chip systems that form rich libraries of predesigned, preverified building blocks. These embedded cores make it easier to import technology to a new system and differentiate the corresponding product by leveraging intellectual property advantages. Most importantly, design reuse shortens the time-to-market for new systems. The attributes that make system chips built with embedded IP cores an attractive methodology-design reuse, heterogeneity, reconfigurability, and customizability-also make testing and debugging these chips a complex challenge. The authors review the various alternatives for testing embedded cores and describe solutions and proposed standards that are expected to play a key role in developing the core-based design paradigm.
引用
收藏
页码:52 / +
页数:10
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