A Feed-Forward Equalizer for Capacitively Coupled On-Chip Interconnect

被引：5

作者：

Naveen, K. ^{[1
]}

Dave, Marshnil ^{[1
]}

Baghini, Maryam Shojaei ^{[1
]}

Sharma, Dinesh K. ^{[1
]}

机构：

[1] Indian Inst Inst Technol, Dept Elect Engn, Bombay 400076, Maharashtra, India

来源：

2013 26TH INTERNATIONAL CONFERENCE ON VLSI DESIGN AND 2013 12TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS (VLSID) | 2013年

关键词：

Feed-forward equalizer; capacitively coupled interconnect; current mode signaling; HIGH-SPEED;

D O I：

10.1109/VLSID.2013.190

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Repeaterless low swing interconnects are potential candidates for high speed low power signaling over on-chip global wires. Capacitive pre-emphasis at the transmitter has been shown to improve the achievable data rate by increasing the relative power at high frequencies. This paper shows an improved transmitter with a 1-tap feed-forward equalizer in addition to capacitive pre-emphasis. A design method for finding the transmitter design parameters using scrupulously chosen bit vectors is also presented. Post layout simulations show that the proposed link achieves a data rate of 4 Gbps over a 10 mm long M8 line with energy consumption of 313 fJ/bit in 90 nm CMOS technology.

引用

页码：215 / 220

页数：6

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