A COMPARATIVE STUDY ON ANALOG/RF PERFORMANCE OF ULTRA-THIN BODY (UTB) SOI AND DOUBLE GATE MOSFETs

被引:2
|
作者
Soin, Norhayati [1 ]
Lun, Yan Ching [1 ]
机构
[1] Univ Malaya, Fac Engn, Kuala Lumpur 50603, Malaysia
关键词
D O I
10.1109/SMELEC.2008.4770280
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a comprehensive comparison of analog/RF performance of ultra-thin-body (UTB) SOI and double-gate (DG) devices was investigated through simulation. Analog/RF figures of merit, which was being estimated including intrinsic gain, g(m)/g(ds), g(m)/I-ds, values, transition/cut-off frequency,f(T), maximum oscillation frequency, f(MAX), and minimum noise figure, NFmin. Due to the unique structure of double-gate (DG) devices, it can exhibit excellent analog/RF behaviors. Higher g(m)/I-ds ratio and intrinsic gain, g(m)/g(ds) can be received by comparing with the ultra-thin-body (UTB) SOI. Superior fT and f(MAX), which are due to higher transconductance, g, and lower output conductance, g(m)/g(ds) can be observed in the double-gate devices. In addition, better noise and gains performance can be achieved resulting from improved g.. Thus, the double-gate devices can be considered as better candidates for analog/RF applications.
引用
收藏
页码:76 / 81
页数:6
相关论文
共 50 条
  • [41] Antenna protection strategy for ultra-thin gate MOSFETs
    Krishnan, S
    Amerasekera, A
    1998 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 36TH ANNUAL, 1998, : 302 - 306
  • [42] RF performance and scaling capability of thin-body GOI and SOI MOSFETs
    An, Xia
    Huang, Ru
    Zhuge, Jing
    Zhang, Xing
    Wang, Yangyuan
    2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS, 2005, : 87 - 90
  • [43] Analytical subthreshold current modeling of nanoscale ultra-thin body ultra-thin box SOI MOSFETs with a vertical gaussian doping profile
    Sufen Wei
    Guohe Zhang
    Huixiang Huang
    Jing Liu
    Zhibiao Shao
    Li Geng
    Cheng-Fu Yang
    Microsystem Technologies, 2018, 24 : 179 - 192
  • [44] Hot-carrier degradation model for nanoscale ultra-thin body ultra-thin box SOI MOSFETs suitable for circuit simulators
    Karatsori, T. A.
    Theodorou, C. G.
    Haendler, S.
    Planes, N.
    Ghibaudo, G.
    Dimitriadis, C. A.
    MICROELECTRONIC ENGINEERING, 2016, 159 : 9 - 16
  • [45] Analytical subthreshold current modeling of nanoscale ultra-thin body ultra-thin box SOI MOSFETs with a vertical gaussian doping profile
    Wei, Sufen
    Zhang, Guohe
    Huang, Huixiang
    Liu, Jing
    Shao, Zhibiao
    Geng, Li
    Yang, Cheng-Fu
    MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2018, 24 (01): : 179 - 192
  • [46] Parasitic bipolar effect in ultra-thin FD SOI MOSFETs
    Liu, F. Y.
    Ionica, I.
    Bawedin, M.
    Cristoloveanu, S.
    SOLID-STATE ELECTRONICS, 2015, 112 : 29 - 36
  • [47] Ultra-thin body and thin-BOX SOI CMOS technology analog figures of merit
    Kilchytska, V.
    Arshad, M. K. Md
    Makovejev, S.
    Olsen, S.
    Andrieu, F.
    Poiroux, T.
    Faynot, O.
    Raskin, J. -P.
    Flandre, D.
    SOLID-STATE ELECTRONICS, 2012, 70 : 50 - 58
  • [48] Electron mobility and magneto transport study of ultra-thin channel double-gate Si MOSFETs
    Prunnila, M
    Ahopelto, J
    Gamiz, F
    SOLID-STATE ELECTRONICS, 2005, 49 (09) : 1516 - 1521
  • [49] The impact of high-k dielectrics on the performance of Schottky barrier source/drain (SBSD) ultra-thin body (UTB) SOI MOSFET
    Luan, Su-Zhen
    Liu, Hong-Xia
    Jia, Ren-Xu
    Cai, Nai-Qiong
    Wang, Jin
    Wuli Xuebao/Acta Physica Sinica, 2008, 57 (07): : 4476 - 4481
  • [50] Investigation of gate-induced drain leakage (GIDL) current in thin body devices: Single-gate ultra-thin body, symmetrical double-gate, and asymmetrical double-gate MOSFETs
    Choi, YK
    Ha, D
    King, TJ
    Bokor, J
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2003, 42 (4B): : 2073 - 2076