Design of a 16-bit real time stack processor in FPGA

被引:0
|
作者
Du, YC [1 ]
机构
[1] Northeastern Univ, Shenyang 110004, Peoples R China
关键词
FPGA; stack processor; state machine; behavioral description;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The basic structure and features of a 16-bit real time stack. processor is introduced. The design and implementation method of the 16-bit stack processor is presented in the paper. The behavioral description and state machine description is applied to program design using VHDL. The 16-bit real time stack processor implemented by Spartan-II XC2S200 FPGA chip, and is successfully adopted in frequency spectrum controller system of MRI.
引用
收藏
页码:726 / 729
页数:4
相关论文
共 50 条
  • [21] FPGA ENABLES FAST, 16-BIT COUNTER DESIGNS
    CHILD, J
    COMPUTER DESIGN, 1991, 30 (12): : 138 - 138
  • [22] REAL-TIME OPERATING 16-BIT MICROCOMPUTER IN EXPERIMENTAL PHYSICS
    CULLELL, JA
    LECAS, M
    BRENOT, JC
    HOUVER, JC
    REVIEW OF SCIENTIFIC INSTRUMENTS, 1985, 56 (01): : 154 - 158
  • [23] A SINGLE-CHIP 16-BIT 25-NS REAL-TIME VIDEO IMAGE SIGNAL PROCESSOR
    KIKUCHI, K
    NUKADA, Y
    AOKI, Y
    KANOU, T
    ENDO, Y
    NISHITANI, T
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (06) : 1662 - 1667
  • [24] SPEEDY 16-BIT MICROCONTROLLER TACKLES REAL-TIME APPLICATIONS
    BURSKY, D
    ELECTRONIC DESIGN, 1988, 36 (11) : 45 - &
  • [25] Design of a 16-bit Adiabatic Microprocessor
    Celis-Cordova, Rene
    Orlov, Alexei O.
    Lu, Tian
    Kulick, Jason M.
    Snider, Gregory L.
    PROCEEDINGS OF THE 2019 FOURTH IEEE INTERNATIONAL CONFERENCE ON REBOOTING COMPUTING (ICRC), 2019, : 106 - 109
  • [26] REAL-TIME IMPLEMENTATION OF THE VSELP ON A 16-BIT DSP CHIP
    SUNWOO, MH
    PARK, S
    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1991, 37 (04) : 772 - 782
  • [27] A 16-Bit by 16-Bit MAC Design Using Fast 5:3 Compressor Cells
    Ohsang Kwon
    Kevin Nowka
    Earl E. Swartzlander
    Journal of VLSI signal processing systems for signal, image and video technology, 2002, 31 : 77 - 89
  • [28] A 16-bit x 16-bit MAC design using fast 5:2 compressors
    Kwon, O
    Nowka, K
    Swartzlander, EE
    IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES, AND PROCESSORS, PROCEEDINGS, 2000, : 235 - 243
  • [29] A 16-bit by 16-bit MAC design using fast 5:3 compressor cells
    Kwon, O
    Nowka, K
    Swartzlander, EE
    JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2002, 31 (02): : 77 - 89
  • [30] BIPOLAR PROCESSOR MAKES A POWERFUL, 16-BIT MICROPROGRAMMABLE CONTROLLER
    HARMON, B
    MILLER, W
    ELECTRONIC DESIGN, 1979, 27 (21) : 118 - 122