CNFET-based design of resilient MCML XOR/XNOR circuit at 16-NM technology node

被引:0
|
作者
Srivastava, Pragya [1 ]
Islam, Aminul [1 ]
机构
[1] Birla Inst Technol, Dept Elect & Commun Engn, Ranchi 835215, Bihar, India
关键词
CNFET; EDP; MOS current mode logic; Power delay Product; Propagation delay (t(p)); Variability; FIELD-EFFECT TRANSISTORS; COMPACT SPICE MODEL; INCLUDING NONIDEALITIES;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Due to aggressive scaling, CMOS technology is facing a few critical issues. Few of them are variability, subthreshold leakage, gate leakage, and short-channel effects. Variability has become a metric of equal importance as power, delay, and area in deep submicron technology node. Therefore, this paper carries out power delay product (PDP) variability analysis of MOS current mode logic (MCML) and CMOS inverter/buffer and XOR/XNOR circuits in addition to propagation delay (t(p)), average power (PWR), power-delay product (PDP) and energy-delay product (EDP) analysis at 16-nm technology node. MCML inverter/buffer (XOR/XNOR) circuits prove their robustness by exhibiting 1.66x (1.82x) improvement in PDP variability at nominal supply voltage of V-DD = 0.7 V. Therefore, this work realizes XOR/XNOR circuit using carbon nanotube field effect transistor (CNFET). CNFET based MCML XOR/XNOR circuit exhibits lower t(p) (by 91.20x), lower PDP (by 3.15x) and lower EDP (by 287.69x) compared to MOSFET based MCML XOR/XNOR at nominal V-DD.
引用
收藏
页码:261 / 267
页数:7
相关论文
共 50 条
  • [31] Design of Two-Way Transformer Combining E-Band Power Amplifiers Using 16-nm FinFET Technology With Optimal Matching Networks
    Ng, Yuen-Sum
    Wang, Yunshan
    Chen, Sheng-Chun
    Wang, Huei
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2025,
  • [32] SE Performance of a Schmitt-Trigger-Based D-Flip-Flop Design in a 16-nm Bulk FinFET CMOS Process
    Jiang, H.
    Zhang, H.
    Ball, D. R.
    Massengill, L. W.
    Bhuva, B. L.
    Assis, T. R.
    Narasimham, B.
    2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2016,
  • [33] Source Mask Optimization based on Design Pattern Library at 7nm Technology Node
    Su, Xiaojing
    Dong, Lisong
    Wei, Yayi
    Gai, Tianyang
    Su, Yajuan
    Chen, Rui
    DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION XV, 2021, 11614
  • [34] Effects of Total-Ionizing-Dose Irradiation on Single-Event Response for Flip-Flop Designs at a 14-/16-nm Bulk FinFET Technology Node
    Zhang, H.
    Jiang, H.
    Fan, X.
    Kauppila, J. S.
    Chatterjee, I.
    Bhuva, B. L.
    Massengill, L. W.
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2018, 65 (08) : 1928 - 1934
  • [35] CDM Protection Design using Internal Power Node for Cross Power Domain in 16nm CMOS Technology
    Narita, Koki
    Okushima, Mototsugu
    2016 38TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2016,
  • [36] Single-Event Performance of Sense-Amplifier Based Flip-Flop Design in a 16-nm Bulk FinFET CMOS Process
    Jiang, H.
    Zhang, H.
    Assis, T. R.
    Narasimham, B.
    Bhuva, B. L.
    Holman, W. T.
    Massengill, L. W.
    IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2017, 64 (01) : 477 - 482
  • [37] Analog Circuit and Device Interaction in High-Speed SerDes Design in 16nm FinFET CMOS Technology
    Zhong, Freeman
    Sinha, Ashutosh
    2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2014,
  • [38] A scaled floating body cell (FBC) memory with high-k plus metal gate on thin-silicon and thin-BOX for 16-nm technology node and beyond
    Ban, Ibrahim
    Avci, Uygar E.
    Kencke, David L.
    Chang, Peter L. D.
    2008 SYMPOSIUM ON VLSI TECHNOLOGY, 2008, : 71 - +
  • [39] A scaled floating body cell (FBC) memory with High-k plus metal gate on thin-silicon and thin-BOX for 16-nm technology node and beyond
    Ban, Ibrahim
    Avci, Uygar E.
    Kencke, David L.
    Chang, Peter L. D.
    2008 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2008, : 92A - 93A
  • [40] Multi-gate device and summing-circuit co-design robustness studies @ 32-nm technology node
    Kumar, Amresh
    Islam, Aminul
    MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2017, 23 (09): : 4099 - 4109