Gate Stack Process Optimization for TDDB Improvement in 28nm High-k/Metal Gate nMOSFETs

被引：0
|
作者：
Lee, Kyong Taek [1 ]
Kim, Hyunjin [1 ]
Park, Junekyun [1 ]
Park, Jongwoo [1 ]
机构：
[1] Samsung Elect, Syst LSI Div, Technol Reliabil, Yongin 446711, Gyeonggi Do, South Korea
来源：
2012 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2012年
关键词：
RELIABILITY;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The effects of IL (interfacial layer) thickness and nitrogen concentration of high-k layer on TDDB are comprehensively investigated for HK/MG nMOSFETs. Comparison of the TDDB characteristics based on IL thickness splits manifests that thick IL device exhibits longer failure time and lower SILC augment due to reduction of IL tunneling rate of electron. However, the gate leakage current of thick IL device is aggravated by decrease of total physical oxide thickness even for the same EOT due mainly to thinner HK thickness. Since SILC behavior is attributed to the bulk transient charge trapping by pre-existing defects in HK, the process optimization to reduce bulk defects in HK is a critical solution to improve TDDB in HK/MG nMOSFETs. In addition, nitridation process after HK deposition contributes to passivate oxygen vacancies in the gate dielectrics and removes electron leakage path driven by oxygen vacancies. Hence, nMOSFET with higher nitrogen concentration shows improved TDDB reliability without compromise in DC characteristics and the power law voltage acceleration factor.
引用
收藏
页数：4
相关论文
共 50 条
  • [31] Intermodulation Linearity in High-k/Metal Gate 28 nm RF CMOS Transistors
    Li, Zhen
    Niu, Guofu
    Liang, Qingqing
    Imura, Kimihiko
    ELECTRONICS, 2015, 4 (03): : 614 - 622
  • [32] Transistor mismatch in 32 nm high-k metal-gate process
    Yuan, X.
    Shimizu, T.
    Mahalingam, U.
    Brown, J. S.
    Habib, K.
    Tekleab, D. G.
    Su, T. -C.
    Satadru, S.
    Olsen, C. M.
    Lee, H.
    Pan, L. -H.
    Hook, T. B.
    Han, J. -P.
    Park, J. -E.
    Na, M. -H.
    Rim, K.
    ELECTRONICS LETTERS, 2010, 46 (10) : 708 - U66
  • [33] Dielectric breakdown in a 45 nm high-k/metal gate process technology
    Prasad, C.
    Agostinelli, M.
    Auth, C.
    Brazier, M.
    Chau, R.
    Dewey, G.
    Ghani, T.
    Hattendorf, M.
    Hicks, J.
    Jopling, J.
    Kavalieros, J.
    Kotlyar, R.
    Kuhn, M.
    Kuhn, K.
    Maiz, J.
    McIntyre, B.
    Metz, M.
    Mistry, K.
    Pae, S.
    Rachmady, W.
    Ramey, S.
    Roskowski, A.
    Sandford, J.
    Thomas, C.
    Wiegand, C.
    Wiedemer, J.
    2008 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 46TH ANNUAL, 2008, : 667 - +
  • [34] RF Power Potential of High-k Metal Gate 28 nm CMOS Technology
    Ouhachi, R.
    Pottrain, A.
    Ducatteau, D.
    Okada, E.
    Gaquiere, C.
    Gloria, D.
    2013 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS), VOLS 1-2, 2013, : 181 - 184
  • [35] The Experimental Demonstration of the BTI-Induced Breakdown Path in 28nm High-k Metal Gate Technology CMOS Devices
    Hsieh, E. R.
    Lu, P. Y.
    Chung, Steve S.
    Chang, K. Y.
    Liu, C. H.
    Ke, J. C.
    Yang, C. W.
    Tsai, C. T.
    2014 SYMPOSIUM ON VLSI TECHNOLOGY (VLSI-TECHNOLOGY): DIGEST OF TECHNICAL PAPERS, 2014,
  • [36] New Insight on the Frequency Dependence of TDDB in High-k/Metal Gate Stacks
    Bezza, A.
    Rafik, M.
    Roy, D.
    Federspiel, X.
    Mora, P.
    Ghibaudo, G.
    2013 IEEE INTERNATIONAL INTEGRATED RELIABILITY WORKSHOP FINAL REPORT (IRW), 2013, : 11 - 14
  • [37] Channel mobility degradation and charge trapping in high-k/metal gate NMOSFETs
    Mathew, S
    Bera, LK
    Balasubramanian, N
    Joo, MS
    Cho, BJ
    THIN SOLID FILMS, 2004, 462 : 11 - 14
  • [38] A new process and tool for metal/high-k gate dielectric stack for sub-45 nm CMOS manufacturing
    Venkateshan, A.
    Singh, R.
    Poole, K. F.
    Senter, H.
    ISSM 2007: 2007 INTERNATIONAL SYMPOSIUM ON SEMICONDUCTOR MANUFACTURING, CONFERENCE PROCEEDINGS, 2007, : 493 - +
  • [39] Impact of Off State Stress on advanced high-K metal gate NMOSFETs
    Spessot, Alessio
    Aoulaiche, Marc
    Cho, Moonju
    Franco, Jacopo
    Schram, Tom
    Ritzenthaler, Romain
    Kaczer, Ben
    PROCEEDINGS OF THE 2014 44TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC 2014), 2014, : 365 - 368
  • [40] Reliability Characteristics of La-doped High-k/Metal Gate nMOSFETs
    Kang, C. Y.
    Choi, R.
    Lee, B. H.
    Jammy, R.
    JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2009, 9 (03) : 166 - 173
12345