Modeling and Analysis on Radiation of On-Chip Power Ring

被引：0
|
作者：
Wang, Yibin [1 ]
Wang, Cexing [1 ]
Su, Tao [1 ]
机构：
[1] Sun Yat Sen Univ, Sch Elect & Informat Technol, Guangzhou, Guangdong, Peoples R China
来源：
2017 IEEE SIXTH ASIA-PACIFIC CONFERENCE ON ANTENNAS AND PROPAGATION (APCAP) | 2017年
基金：
中国国家自然科学基金;
关键词：
On-chip power ring; Transmission line; Radiation Emission; Modeling; TRANSMISSION-LINE;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents models of on-chip power ring for predicting the frequency response of the radiation emission. The basic model of the single-pair power ring structure is built to predict the phase of the input reflection coefficient. Combining the transmission coefficient of the corner, the corner transmission model has been proposed to predict the attenuation peaks of the input reflection coefficient. Finally, according to the traveling wave method, the distributed parameter model has been proposed to calculate the amplitude and phase curve of the input reflection coefficient. The three aforementioned models have been implemented by MATLAB software. Full-wave electromagnetic simulation with HFSS are performed to verify the models.
引用
收藏
页数：3
相关论文
共 50 条
  • [31] Inductance modeling for on-chip interconnects
    Tu, SW
    Shen, WZ
    Chang, YW
    Chen, TC
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL III, PROCEEDINGS, 2002, : 787 - 790
  • [32] Multi-GHZ Modeling and Characterization of On-Chip Power Delivery Network
    Pandit, Vishram S.
    Ryu, Woong Hwan
    2008 IEEE-EPEP ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING, 2008, : 105 - 108
  • [33] Inductance modeling for on-chip interconnects
    Tu, SW
    Shen, WZ
    Chang, YW
    Chen, TC
    Jou, JY
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2003, 35 (01) : 65 - 78
  • [34] An alternative architecture for on-chip global interconnect: Segmented bus power modeling
    Zhang, Y
    Ye, W
    Irwin, MJ
    CONFERENCE RECORD OF THE THIRTY-SECOND ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, VOLS 1 AND 2, 1998, : 1062 - 1065
  • [35] Modeling of on-chip spiral inductors
    Hashemi, S
    Safarian, Z
    Masoumi, N
    17th ICM 2005: 2005 International Conference on Microelectronics, Proceedings, 2005, : 75 - 81
  • [36] Modeling and characterization of on-chip transformers
    Mohan, SS
    Yue, CP
    Hershenson, MD
    Wong, SS
    Lee, TH
    INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, : 531 - 534
  • [37] Contemporary On-chip System Modeling using FDTD in Low Power Regime
    Agrawal, Yash
    Chandel, Rajeevan
    Girish, Mekala
    Parekh, Rutu
    2018 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS 2018), 2018,
  • [38] On-Chip Spiral Inductors and On-Chip Spiral Transistors for Accurate Numerical Modeling
    Dhamodaran, M.
    Kumar, R. Praveen
    Jegadeesan, S.
    JOURNAL OF MAGNETICS, 2018, 23 (01) : 50 - 54
  • [39] Distributed On-Chip Power Delivery
    Koese, Selcuk
    Friedman, Eby G.
    IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2012, 2 (04) : 704 - 713
  • [40] Analysis and modeling of on-chip transformers under two ground conditions
    韦家驹
    王志功
    李智群
    唐路
    半导体学报, 2012, (06) : 109 - 113
12345