Attomolar streptavidin and pH, low power sensor based on 3D vertically stacked SiNW FETs

被引:0
|
作者
Buitrago, Elizabeth [1 ]
Fernandez-Bolanos, Montserrat [1 ]
Georgiev, Yordan M. [2 ]
Yu, Ran [2 ]
Lotty, Olan [2 ]
Holmes, Justin D. [2 ]
Nightingale, Adrian M. [3 ]
Ionescu, Adrian M. [1 ]
机构
[1] Ecole Polytech Fed Lausanne, Nanolab, CH-1015 Lausanne, Switzerland
[2] Natl Univ Ireland Univ Coll Cork, Tyndall Natl Inst, Mat Chem & Anal Grp, Cork, Ireland
[3] Univ London Imperial Coll Sci Technol & Med, London, England
关键词
NANOWIRES;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
3D vertically stacked silicon nanowire (SiNW) field effect transistors (FET) with high density arrays (up to 7x20) of fully depleted and ultra-thin (15-30 nm) suspended channels were fabricated by a top-down CMOS compatible process on silicon on insulator (SOI). The channels can be wrapped by conformal high-kappa gate dielectrics (HfO2) and their conductivity can be excellently controlled either by a reference electrode or by three local gates; a backgate (BG) and two symmetrical Pt side-gates (SG) offering unique sensitivity tuning. Such 3D structure has been (3-Aminopropyl)- triethoxysilane (APTES) functionalized and biotynilated for pH and streptavidin (protein) sensing, respectively. An ultra-low concentration of 17 aM of streptavidin was measured, the lowest ever reported in literature. Extremely high quasiexponential drain current responses (Delta I-d/pH) of similar to 0.70 dec/pH were measured for structures with APTES functionalized SiO2 gate dielectrics when operated in the subthreshold regime. Also, high drain current responses > 20 mu A/pH and high sensitivities (S similar to 95%) were measured for structures with a native oxide gate dielectrics when operated in the strong-inversion regime.
引用
收藏
页数:2
相关论文
共 50 条
  • [21] An Image Inpainting Method for Interleaved 3D Stacked Image Sensor
    Gao, Jing
    Zhu, Jingyu
    Nie, Kaiming
    Xu, Jiangtao
    IEEE SENSORS JOURNAL, 2019, 19 (24) : 12253 - 12260
  • [22] Monolithic 3D SRAM Cell with Stacked Two-Dimensional Materials based FETs at 2nm Node
    Hu, Vita Pi-Ho
    Su, Cheng-Wei
    Yu, Chun-Chi
    Liu, Chang-Ju
    Weng, Cheng-Yang
    2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2021,
  • [23] An IR Proximity-Based 3D Motion Gesture Sensor for Low-Power Portable Applications
    Kim, Jeong Seok
    Yun, Seong Jin
    Seol, Dong Jin
    Park, Hee Ju
    Kim, Yong Sin
    IEEE SENSORS JOURNAL, 2015, 15 (12) : 7009 - 7016
  • [24] A 3D Stacked Step-Down Intergrated Power Module
    Liu, Wenbo
    Liu, Yan-Fei
    Wang, Laili
    Malcolm, Doug
    2017 THIRTY SECOND ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC), 2017, : 890 - 897
  • [25] True 3D Packaging Solution for Stacked Vertical Power Devices
    Rouger, N.
    Benaissa, L.
    Widiez, J.
    Imbert, B.
    Gaude, V.
    Verrun, S.
    Crebier, J. C.
    2013 25TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD), 2013, : 97 - 100
  • [26] Scheduling Tests for 3D Stacked Chips under Power Constraints
    Breeta SenGupta
    Urban Ingelsson
    Erik Larsson
    Journal of Electronic Testing, 2012, 28 : 121 - 135
  • [27] Scheduling Tests for 3D Stacked Chips under Power Constraints
    SenGupta, Breeta
    Ingelsson, Urban
    Larsson, Erik
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2012, 28 (01): : 121 - 135
  • [28] Power Integrity Optimization of 3D Chips Stacked Through TSVs
    Ahmad, Waqar
    Zheng, Li-Rong
    Weeraseker, Roshan
    Chen, Qiang
    Weldezion, Awet Yemane
    Tenhunen, Hannu
    ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, 2009, : 105 - 108
  • [29] A low-power monolithically stacked 3D-TCAM
    Lin, Mingjie
    Luo, Jianying
    Ma, Yaling
    PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10, 2008, : 3318 - +
  • [30] An Image Sensor/Processor 3D Stacked Module featuring ThruChip Interfaces
    Ikebe, Masayuki
    Asai, Tetsuya
    Mori, Masafumi
    Itou, Toshiyuki
    Uchida, Daisuke
    Take, Yasuhiro
    Kuroda, Tadahiro
    Motomura, Masato
    2017 22ND ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC), 2017, : 7 - 8