Increasing the Fault Coverage of a Truncated Test Set

Defect-aware, cell-aware, and gate-exhaustive faults are described by input patterns of subcircuits or cells that are expected to activate defects. Even with single-cycle faults, an n-input subcircuit can have up to 2n faults with unique fault detection conditions, resulting in a large test set. Such a test set may have to be truncated to fit in the tester memory or satisfy constraints on test application time. In this case, a loss of fault coverage is inevitable. This article considers the test set denoted by T-1 obtained after truncating a larger test set denoted by T-0. Suppose that the truncation reduces the set of detected faults from the set denoted by D-0 to the set denoted by D-1. The procedure described in this article modifies the tests in T-1 to gain the detection of faults from D-0\D-1, even at the cost of losing the detection of faults from D-1. The goal is to reduce the fault coverage loss by computing a test set denoted by T-2 that detects a set of faults denoted by D-2 such that |T-2| = |T-1 | and |D-2 | > |D-1 |. Experimental results for benchmark circuits demonstrate the ability of the procedure to increase the coverage of gate-exhaustive faults over several iterations.