Dynamic-range enhancement of an optimized 1-bit A/D converter

A technique is demonstrated for extending the dynamic range of 1-bit analog-to-digital converters (ADCs) that sample at the maximum rate using a sinusoid reference r (t) = A(r) cos(2pif(r)t). The ADC has a detection limit B = piA(r)delta/Delta, where 2delta(s) is the base-clock period, and Delta = sampling interval = 1/2f(r) greater than or equal to 2delta. Optimal sampling is achieved at Delta = 2delta, but with large quantization errors found in the sampled representation of the input signal s(t). Dithering with noise n(sigma)(t) of appropriate variance sigma(2) is utilized to measure a subthreshold s(t) where \s(t)\ < B for all t. Both uniform white noise (UWN) and Gaussian white noise (GWN) are utilized. With UWN dithering at sigma = B, we could reduce the errors to levels that are produced by an equivalent q-bit amplitude-sampling (bipolar) ADC by observing the dithered signal s(t) + n(sigma)(t) over a time duration of T[(0.116/vertical bar V vertical bar)(2(q)-1)](0.995), where T is the sampling period, and +/- V are the ADC supply voltages. With GWN dithering at sigma = 0.5B, the duration required is T[(0.109/V)(2(q-1))](0.996).