0.18-μm CMOS Process highly sensitive differential optically reconfigurable gate array VLSI

被引：0

作者：

Watanabe, Takahiro ^{[1
]}

Watanabe, Minoru ^{[1
]}

机构：

[1] Shizuoka Univ, Hamamatsu, Shizuoka 4328561, Japan

来源：

2012 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI) | 2012年

关键词：

Field Programmable Gate Arrays; Holographic memory; Optically reconfigurable gate arrays;

D O I：

10.1109/ISVLSI.2012.71

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Currently, demand is increasing for high-speed dynamic reconfiguration on programmable devices to improve their performance. To support high-speed dynamic reconfiguration, optically reconfigurable gate arrays (ORGAs) have been undergoing rapid development. Moreover, to more increase the reconfiguration speed, optically differential reconfigurable gate arrays (ODRGAs) incorporating a differential reconfiguration method between configuration contexts have been developed. An ODRGA comprises a holographic memory, a laser array, and an optically reconfigurable gate array VLSI. The holographic memory can store many configuration contexts. Its large-bandwidth optical connection enables high-speed reconfiguration. However, photodiode sensitivities of conventional ODRGAs are not good. This paper therefore presents a newly fabricated 0.18 mu m CMOS process optically differential reconfigurable gate array VLSI chip with highly sensitive photo-circuits.

引用

页码：308 / 313

页数：6

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