共 50 条
- [1] The Study of Warpage of an Embedded Substrate of the Flip Chip Chip Size Package 2019 IEEE CPMT SYMPOSIUM JAPAN (ICSJ), 2019, : 201 - 203
- [2] Effects of Substrate Structure on the Warpage of Flip Chip IC Packages 2018 13TH INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY AND CIRCUITS TECHNOLOGY CONFERENCE (IMPACT), 2018, : 66 - 70
- [3] A Study on Warpage Behavior of Underfill in Flip Chip 2023 24TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT, 2023,
- [4] Balanced Embedded Trace Substrate Design for Warpage Control 2015 IEEE 65TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2015, : 193 - 199
- [5] Characterization of in-process substrate warpage of underfilled flip chip assembly IEEE/CPMT/SEMI(R) 28TH INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 2003, : 291 - 297
- [6] Effect of Substrate Warpage on Flip Chip BGA Thermal Stress Simulation 2010 12TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2010, : 500 - 504
- [8] Accurate predictions of flip chip BGA warpage 53RD ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2003 PROCEEDINGS, 2003, : 549 - 553
- [9] Study of Dynamic Warpage of Flip Chip Packages under Temperature Reflow IEMT 2006: 31ST INTERNATIONAL CONFERENCE ON ELECTRONICS MANUFACTURING AND TECHNOLOGY, 2006, : 185 - 190