Circuit Reliability: From Physics to Architectures

被引：0

作者：

Fang, Jianxin ^{[1
]}

Gupta, Saket ^{[1
]}

Kumar, Sanjay V. ^{[1
]}

Marella, Sravan K. ^{[1
]}

Mishra, Vivek ^{[1
]}

Zhou, Pingqiang ^{[1
]}

Sapatnekar, Sachin S. ^{[1
]}

机构：

[1] Univ Minnesota, ECE Dept, Minneapolis, MN 55455 USA

来源：

2012 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD) | 2012年

关键词：

Bias temperature instability; hot carriers; oxide breakdown; electromigration; 3D ICs; stress; ELECTROMIGRATION ANALYSIS; PERFORMANCE DEGRADATION; LIFETIME RELIABILITY; SILICON ODOMETER; FAILURE MODES; NBTI; AWARE; IMPACT; OPTIMIZATION; NODE;

D O I：

暂无

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

In the period of extreme CMOS scaling, reliability issues are becoming a critical problem. These problems include issues related to device reliability, in the form of bias temperature instability, hot carrier injection, time-dependent dielectric breakdown of gate oxides, as well as interconnect reliability concerns such as electromigration and TSV stress in 3D integrated circuits. This tutorial surveys these effects, and discusses methods for mitigating them at all levels of design.

引用

页码：243 / 246

页数：4

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