Low Power High Speed Gated Ground 7t Sram Using Multi-Threshold Cmos Technique

The technology scaling factor has enhanced the demand of the electronic industry. The memories in the electronics domain play a significant role. There is an urgent need to implement low power techniques on these memories which improves their performance parameters. SRAM (Static random-access memory) a semiconductor memory module which stores each bit with the help of bi-stable latch circuit. In this paper 7T SRAM is analyzed by deploying MTCMOS (Multi-threshold Complementary Metal Oxide Semiconductor) techniques. It is found that power consumption and leakage was improved by 23.3% and 26.40% in comparison to the conventional gated ground 7T SRAM, with not much of a difference in noise. The analysis was performed with cadence virtuoso tool on 45nm technology.