Etch challenges of low-k dielectrics

被引：0
|
作者：
Morey, I [1 ]
Asthana, A [1 ]
机构：
[1] Lam Res Corp, Fremont, CA 94538 USA
来源：
SOLID STATE TECHNOLOGY | 1999年 / 42卷 / 06期
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Unit processes now exist to plasma etch the main categories of possible interconnect low-k dielectrics. Integration challenges and trade-offs remain for all films, though all can be etched within a dual-damascene process flow. Controllability and cost of the integrated process will determine material choice, since unit processes are relatively similar.
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收藏
页码：71 / +
页数：5
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