A single chip motion JPEG codec LSI

被引：11

作者：

Okada, S ^{[1
]}

Matsuda, Y ^{[1
]}

Watanabe, T ^{[1
]}

Kondo, K ^{[1
]}

机构：

[1] SANYO ELECT CO LTD,MOS LSI DIV,GIFU 50301,JAPAN

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1997年 / 43卷 / 03期

关键词：

D O I：

10.1109/30.628651

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have developed a single chip motion JPEG codec LSI that can compress and decompress VGA-size (640 pixels x 480 lines) JPEG images at the rate of 30 frames per second simply by connecting a single external buffer memory chip. The LSI can control compression ratio control technique to store a fixed number of images when there is limited memory capacity, and it compresses data stored in the frame buffer to enable high-speed signal processing without the use of high-speed image memory. The JPEG codec core is small (40,000 gates) and power consumption is low (220 mW), making it well suited to a wide range of image processing applications in consumer products.

引用

页码：418 / 422

页数：5

共 50 条

[1] A single chip motion JPEG codec LSI
Okada, S
Matsuda, Y
Watanabe, T
Kondo, K
INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS, 1997 DIGEST OF TECHNICAL PAPERS, 1997, : 90 - 91
[2] A single chip motion JPEG codec LSI
Okada, S
Matsuda, Y
Watanabe, T
Kondo, K
PROCEEDINGS OF THE IEEE 1997 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1997, : 233 - 236
[3] A SINGLE-CHIP ADM LSI CODEC
IRIE, K
UNO, T
UCHIMURA, K
IWATA, A
IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1983, 31 (01): : 281 - 287
[4] A SINGLE-CHIP ADM LSI-CODEC
IRIE, K
UNO, T
UCHIMURA, K
IWATA, A
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1983, 18 (01) : 33 - 39
[5] A SINGLE CHIP COMPRESSION DECOMPRESSION LSI BASED ON JPEG
OGAWA, K
URANO, T
KONDO, K
MORI, N
MORIAI, S
YAMAMOTO, H
KATO, S
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1992, 38 (03) : 703 - 710
[6] Embedding DRAM in single chip MPEG1 CODEC LSI
Fujihira, T
Ohtsubo, H
Sakurai, H
Ohi, K
PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1999, : 77 - 80
[7] A low-power single-chip MPEG-2 CODEC LSI
Tsuboi, Y
Arai, H
Takahashi, M
Oku, M
PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1999, : 73 - 76
[8] Image compression and decompression (JPEG) LSI chip set
Mizoguchi, Yuji
Kawasaki Steel Technical Report, 1994, (30): : 54 - 57
[9] Real-time JPEG codec chip opens up applications
Mann, D
ELECTRONIC ENGINEERING, 1998, 70 (855): : 12 - +
[10] Single-chip codec plans
不详
COMPUTER DESIGN, 1998, 37 (04): : 100 - 100

← 1 2 3 4 5 →