Efficient Multi-bit SRAMs using Spatial Wavefunction Switched (SWS)-FETs

被引：0

作者：

Gogna, P. ^{[1
]}

Lingalugari, M. ^{[1
]}

Chandy, J. ^{[1
]}

Jain, F. C. ^{[1
]}

Heller, E.

Hasaneen, E-S.

机构：

[1] Univ Connecticut, Dept Elect & Comp Engn, Storrs, CT 06269 USA

来源：

2012 LESTER EASTMAN CONFERENCE ON HIGH PERFORMANCE DEVICES (LEC) | 2012年

关键词：

SWS-FET; Multi Bit SRAM;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents the multiple quantum well channel spatial wavefunction switched FETs (SWS-FETs) configured to implement multi-bit static random access memory (SRAM) cells. A 2-bit SRAM cell consists of two back-to-back connected 4-channel SWS-FETs, where each SWS-FET serves as quaternary inverter. This architecture results in reduction of FET count by 75% and data interconnect density by 50%. The designed 2-bit SRAM cell is simulated using BSIM equivalent channel models (for 25nm FETs). In addition, the binary interface logic and conversion circuitry are designed to integrate the SWS-SRAM technology. Quantum simulations for Si/Ge and InGaAs-based SWS-FETs are also presented.

引用

页数：4

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