65nm CMOS Low-Noise Direct-Conversion Transmitter with Carrier Leakage Calibration for Low-B and EDGE Application

被引:0
|
作者
Chen, Shin-Fu [1 ]
Lee, Yi-Bin [1 ]
Sun, Chih-Hao [1 ]
Kuo, Bing-Jye [1 ]
Dehng, Guang-Kaai [1 ]
机构
[1] MediaTek Inc, Hsinchu 300, Taiwan
关键词
DCT; EDGE; Transmitter; CMOS; Divider; Modulator; PGA; Carrier Leakage Calibration;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A low-noise EDGE transmitter implemented in a 65nm CMOS process using direct-conversion architecture for low-band application is presented. The transmitter consists of a programmable-gain I/Q modulator, a frequency divider and a power detector for carrier leakage calibration. The design delivers maximum output power > 1.5 dBm with a 0.5 dB gain step for the 30 dB dynamic range and has < -68 dBc modulation spectrum at 400-kHz offset under maximum gain level. The out-of-band noise at 20 MHz offset with the power amplifier is -80.9 dBm with 100-kHz resolution bandwidth. The carrier leakage suppression after calibration can reach -50 dBc. The design consumes 21 mA at 1.5-V supply and 40 mA at 2.7-V supply and is housed in a 40-pin QFN package.
引用
收藏
页码:171 / 174
页数:4
相关论文
共 50 条
  • [41] A Low/High Band Highly Linearized Reconfigurable Down Conversion Mixer in 65nm CMOS Process
    Gupta, Nisha
    Dutta, Ashudeb
    Singh, Shiv Govind
    2015 NORDIC CIRCUITS AND SYSTEMS CONFERENCE (NORCAS) - NORCHIP & INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP (SOC), 2015,
  • [42] A Low-Phase-Noise Wide-Tuning-Range Quadrature Oscillator in 65nm CMOS
    Li, Guansheng
    Afshari, Ehsan
    2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2012,
  • [43] A K-Band Variable Gain Low-Noise Amplifier with Low Phase Variation in 65-nm CMOS
    Cheng, Depeng
    Li, Lianming
    Xie, Min
    Wu, Xu
    He, Long
    Sheng, Bin
    2021 IEEE MTT-S INTERNATIONAL WIRELESS SYMPOSIUM (IWS 2021), 2021,
  • [44] A Ka-Band Low Noise Amplifier for Phased Array Radar System in 65nm CMOS
    Cao, Mengdi
    Duan, Luqiang
    Chen, Guopei
    Ma, Ruichang
    Chen, Zhiyuan
    Chi, Baoyong
    2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2019,
  • [45] A broadband low-cost direct-conversion receiver front-end in 90 nm CMOS
    Zhan, Jing-Hong Conan
    Carlton, Brent R.
    Taylor, Stewart S.
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (05) : 1132 - 1137
  • [46] Low-Noise Fractional-N PLL Design with Mixed-Mode Triple-Input LC VCO in 65nm CMOS
    Sun, Yuanfeng
    Yu, Xueyi
    Rhee, Woogeun
    Ko, Sangsoo
    Choo, Wooseung
    Park, Byeong-Ha
    Wang, Zhihua
    2010 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS RFIC SYMPOSIUM, 2010, : 61 - 64
  • [47] A Low Power RF CMOS Direct-Conversion Transmitter Using High Conversion Gain Front end for IEEE 802.15.4 Standard
    Seo, Changwon
    Cho, Hanjin
    Baik, Seyoung
    Kim, Jinyong
    Jin, Ho Jeong
    Cho, Choon Sik
    2015 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2015, : 21 - 22
  • [48] A Low-Power and Low-Noise 20:1 Serializer with Two Calibration Loops in 55-nm CMOS
    Jeong, Yong-Un
    Chae, Joo-Hyung
    Choi, Sungphil
    Yun, Jaekwang
    Jeong, Shin-Hyun
    Kim, Suhwan
    2019 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED), 2019,
  • [49] A low-noise 2.5GHz direct-conversion receiver frond-end with low-distortion baseband filters
    Shana'a, Osama
    2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, Digest of Papers, 2007, : 317 - 320
  • [50] A 0.13 μm CMOS Quad-Band GSM/GPRS/EDGE RF Transceiver Using a Low-Noise Fractional-N Frequency Synthesizer and Direct-Conversion Architecture
    Chen, Pei-Wei
    Lin, Tser-Yu
    Ke, Ling-Wei
    Yu, Rickey
    Tsai, Ming-Da
    Yeh, Stanley
    Lee, Yi-Bin
    Tzeng, Bosen
    Chen, Yen-Horng
    Huang, Sheng-Jui
    Lin, Yu-Hsin
    Dehng, Guang-Kaai
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (05) : 1454 - 1463