Prediction of Wafer Map Categories Using Wafer Acceptance Test Parameters in Semiconductor Manufacturing

被引:1
|
作者
Lim, Martin Ying Song [1 ,2 ]
Sharma, Anurag [2 ]
Chin, Cheng Siong [2 ]
Yip, Tommy Chun Ming [1 ]
Ong, Jonathan Yoong Seang [1 ]
机构
[1] Globalfoundries, Singapore 738406, Singapore
[2] NewRIIS, Singapore 609607, Singapore
来源
ARTIFICIAL INTELLIGENCE APPLICATIONS AND INNOVATIONS, AIAI 2022, PART II | 2022年 / 647卷
关键词
Semiconductor manufacturing; Machine learning; Wafer Acceptance Test;
D O I
10.1007/978-3-031-08337-2_12
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
The semiconductor industry is always looking for new solutions to maximize yield. Recently, the focus has been on utilizing the manufacturing data to help improve operational efficiency and early detection. This paper proposes a framework to find the best combination of machine learning models and data-balancing methods to predict specific wafer map signatures using Wafer Acceptance Test (WAT). WAT is a measurement test performed at multiple locations to identify poorly manufactured wafers. However, therewere instances wherewafers passed every measurement test but were found to have low yield. The proposed framework will be tested on real manufacturing data to demonstrate the viability of predicting wafer map signatures.
引用
收藏
页码:136 / 144
页数:9
相关论文
共 50 条
  • [21] Defective wafer detection using a denoising autoencoder for semiconductor manufacturing processes
    Fan, Shu-Kai S.
    Hsu, Chia-Yu
    Jen, Chih-Hung
    Chen, Kuan-Lung
    Juan, Li-Ting
    ADVANCED ENGINEERING INFORMATICS, 2020, 46
  • [22] Measurement of the Parameters of On-Wafer Semiconductor Devices
    A. A. Savin
    V. G. Guba
    O. N. Bykova
    Measurement Techniques, 2016, 59 : 765 - 772
  • [23] Simulation of test wafer consumption in a semiconductor facility
    Foster, B
    Meyersdorf, D
    Padillo, JM
    Brenner, R
    ASMC 98 PROCEEDINGS - 1998 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE AND WORKSHOP: THEME - SEMICONDUCTOR MANUFACTURING: MEETING THE CHALLENGES OF THE GLOBAL MARKETPLACE, 1998, : 298 - 302
  • [24] Measurement of the Parameters of On-Wafer Semiconductor Devices
    Savin, A. A.
    Guba, V. G.
    Bykova, O. N.
    MEASUREMENT TECHNIQUES, 2016, 59 (07) : 765 - 772
  • [25] A NOVEL QUALITY CLUSTERING METHODOLOGY ON FAB-WIDE WAFER MAP IMAGES IN SEMICONDUCTOR MANUFACTURING
    Hsu, Yuan-Ming
    Jia, Xiaodong
    Li, Wenzhe
    Lee, Jay
    PROCEEDINGS OF ASME 2022 17TH INTERNATIONAL MANUFACTURING SCIENCE AND ENGINEERING CONFERENCE, MSEC2022, VOL 2, 2022,
  • [26] An Improved XGBoost Prediction Model for Multi-Batch Wafer Yield in Semiconductor Manufacturing
    Xu, Hong-Wei
    Qin, Wei
    Sun, Yan-Ning
    IFAC PAPERSONLINE, 2022, 55 (10): : 2162 - 2166
  • [27] Interactive scheduler for a wafer probe centre in semiconductor manufacturing
    Natl Tsing Hua Univ, Hsinchu, Taiwan
    Int J Prod Res, 7 (1883-1900):
  • [28] An interactive scheduler for a wafer probe centre in semiconductor manufacturing
    Huang, SC
    Lin, JT
    INTERNATIONAL JOURNAL OF PRODUCTION RESEARCH, 1998, 36 (07) : 1883 - 1900
  • [29] A resource portfolio planning methodology for semiconductor wafer manufacturing
    Chou, YC
    You, RC
    INTERNATIONAL JOURNAL OF ADVANCED MANUFACTURING TECHNOLOGY, 2001, 18 (01): : 12 - 19
  • [30] The impact of single-wafer processing on semiconductor manufacturing
    Singh, R
    Fakhruddin, M
    Poole, KF
    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2003, 16 (02) : 96 - 101