Set-and-see switch-level simulation for VLSI functional verification

被引：0

作者：

Smith, JW

机构：

来源：

PROCEEDINGS OF THE 39TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III | 1996年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An interactive ''set-and-see'' simulator combines the Magic VLSI layout editor [Ousterhout, et.al., 1984b] and the Esim switch-level simulator [Terman, 1983b] in a unique way. From the layout editor, the designer can extract, flatten, and initialize the circuit for simulation The designer can set logic values of nodes interactively and see the resulting (simulated) node values displayed directly on the layout. The set-and-see simulator suggests the same mode of operation with other editors/simulators.

引用

页码：402 / 405

页数：4

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