RF CMOS linearity analysis using harmonic balance device simulation

被引:0
|
作者
Kopalle, D [1 ]
Niu, GF
Taylor, SS
机构
[1] Auburn Univ, Dept Elect & Comp Engn, 200 Broun Hall, Auburn, AL 36849 USA
[2] Intel Corp, Commun Circuit Lab, Hillsboro, OR 97124 USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Intermodulation linearity of CMOS transistors obtained from device level Harmonic Balance simulation is compared to that obtained using I-V data and good agreement between the two approaches is observed. Linearity is simulated as a function of channel length and oxide thickness. The impact of poly-gate depletion effect on linearity is also analyzed.
引用
收藏
页码:69 / +
页数:2
相关论文
共 50 条
  • [21] CMOS RF device and circuit reliability
    Yuan, JS
    EDMO2003: 11TH IEEE INTERNATIONAL SYMPOSIUM ON ELECTRON DEVICES FOR MICROWAVE AND OPTOELECTRONIC APPLICATIONS, 2003, : 174 - 179
  • [22] Linearity, noise optimization for two stage RF CMOS LNA
    Park, P
    Kim, CS
    Yu, HK
    IEEE REGION 10 INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONIC TECHNOLOGY, VOLS 1 AND 2, 2001, : 756 - 758
  • [23] Simulation of a Centrifugal Pump by Using the Harmonic Balance Method
    Magagnato, Franco
    Zhang, Jinfeng
    INTERNATIONAL JOURNAL OF ROTATING MACHINERY, 2015, 2015
  • [24] ANALYSIS AND MODELING OF THE PADS FOR RF CMOS BASED ON EM SIMULATION
    Cheng, J.
    Li, S.
    Han, B.
    Gao, J.
    Yao, X.
    MICROWAVE JOURNAL, 2010, 53 (10) : 96 - +
  • [25] CMOS RF PA Design: using Complexity to solve the Linearity and Efficiency Trade-Off
    Reynaert, Patrick
    Francois, Brecht
    Kaymaksut, Ercan
    2009 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY: SYNERGY OF RF AND IC TECHNOLOGIES, PROCEEDINGS, 2009, : 207 - 212
  • [26] CMOS RF PA Design: using Complexity to solve the Linearity and Efficiency Trade-Off
    Reynaert, Patrick
    Francois, Brecht
    Kaymaksut, Ercan
    2009 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT 2009), 2009, : 298 - 303
  • [27] Large signal analysis of RF circuits in device simulation
    Stanford Univ., Stanford, CA, United States
    不详
    不详
    IEICE Trans Electron, 6 (908-916):
  • [28] Large signal analysis of RF circuits in device simulation
    Yu, ZP
    Dutton, RW
    Troyanovsky, B
    Sato-Iwanaga, J
    IEICE TRANSACTIONS ON ELECTRONICS, 1999, E82C (06) : 908 - 916
  • [29] Harmonic Balance Simulation for the Nonlinear Analysis of Vibration Isolation System Using Negative Stiffness
    Nor, Mohd Asri Mohd
    Abdullah, Abdul Halim
    Saman, Alias Mat
    2009 SECOND INTERNATIONAL CONFERENCE ON MACHINE VISION, PROCEEDINGS, ( ICMV 2009), 2009, : 339 - 342
  • [30] Device design of SiGeHBTs with low distortion characteristics using harmonic balance device simulator
    Sato-Iwanaga, J
    Asai, A
    Takagi, T
    Tanabe, M
    Yu, ZP
    Dutton, RW
    2003 IEEE INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 2003, : 199 - 202