Analysis and Design of a Delay-Locked Loop with Multiple Radiation-hardened Techniques

This paper presents a delay-locked loop (DLL) with multiple radiation-hardened techniques. A radiation-hardened charge pump (RH-CP) and a radiation-hardened voltage-controlled delay line (RH-VCDL) are proposed to mitigate effects on DLLs caused by single-event transient (SET). A lock detection module (LDM) is designed in the RH-CP to separate CP and VCDL when the DLL is locked. Thanks to LDM, the voltage transients caused by ion strikes on CP can be prevented from effecting the control voltage of VCDL and causing inverted lock error. A SET correction module (SCM) combined with sliced delay cells is used in the RH-VCDL to select the uncorrupted output and avoid missing pulses errors occurring at the output of DLL. The proposed DLL is designed in 22-nm CMOS process with an operation frequency of 5 GHz. Simulations at linear energy transfer (LET) between 40 and 100 MeV-cm(2)/mg show that RH-CP eliminates inverted lock error and RH-VCDL mitigates missing pulses generated by the DLL after ion strikes effectively.