A scheduling algorithm based on critical factors for heterogeneous multicore processors

被引:0
|
作者
Li, Chen [1 ]
Lin, Ziniu [1 ]
Tian, Lihua [1 ]
Zhang, Bin [1 ]
机构
[1] Xi An Jiao Tong Univ, Sch Software Engn, Xian, Peoples R China
来源
基金
中国国家自然科学基金;
关键词
heterogeneous multicore processors; machine learning; thread scheduling; PERFORMANCE; AWARE; HARDWARE;
D O I
10.1002/cpe.7969
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
As the development of chip manufacturing technology slows down, high-performance processors often have high energy consumption and high heat generation. Therefore, heterogeneous multi-core processors become more and more popular, and the heterogeneous multi-core processors is adopted to execute programs. At present, the general program consists of multiple threads. To reach goals of accelerating program execution and reducing energy consumption and heat generation of system, a suitable thread scheduling algorithm for heterogeneous multi-core processors is needed. In this article, a thread scheduling algorithm based on multiple critical scheduling factors is proposed. First, a prediction model of thread performance and energy consumption is used to predict the core sensitivity of threads. Then, critical threads are judged and accelerated by collecting the synchronization information between threads. Finally, the load balancing method based on the computing power of cores and the core sensitivity of threads is employed to perform system load balancing, which ensures the fairness of the scheduling. Several experiments are provided, and the results show that the proposed algorithm can obtain better performance of thread schedule.
引用
收藏
页数:18
相关论文
共 50 条
  • [31] SELFISHMIGRATE: A Scalable Algorithm for Non-clairvoyantly Scheduling Heterogeneous Processors
    Im, Sungjin
    Kulkarni, Janardhan
    Munagala, Kamesh
    Pruhs, Kirk
    2014 55TH ANNUAL IEEE SYMPOSIUM ON FOUNDATIONS OF COMPUTER SCIENCE (FOCS 2014), 2014, : 531 - 540
  • [32] Collaborative Scheduling of DAG Structured Computations on Multicore Processors
    Xia, Yinglong
    Prasanna, Viktor K.
    PROCEEDINGS OF THE 2010 COMPUTING FRONTIERS CONFERENCE (CF 2010), 2010, : 63 - 72
  • [33] Task-Aware Priority Scheduling for Multicore Processors
    Shi, Qiu-Wei
    PROCEEDINGS OF THE 2016 INTERNATIONAL CONFERENCE ON COMPUTER ENGINEERING AND INFORMATION SYSTEMS, 2016, 52 : 106 - 110
  • [34] Contention-Aware Scheduling for Asymmetric Multicore Processors
    Fan, Xiaokang
    Sui, Yulei
    Xue, Jingling
    2015 IEEE 21ST INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS (ICPADS), 2015, : 742 - 751
  • [35] Scheduling dense linear algebra operations on multicore processors
    Kurzak, Jakub
    Ltaief, Hatem
    Dongarra, Jack
    Badia, Rosa M.
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2010, 22 (01): : 15 - 44
  • [36] Thermal Prediction and Scheduling of Network Applications on Multicore Processors
    Chou, Chih-Hsun
    Belviranli, Mehmet E.
    Bhuyan, Laxmi N.
    2013 ACM/IEEE SYMPOSIUM ON ARCHITECTURES FOR NETWORKING AND COMMUNICATIONS SYSTEMS (ANCS), 2013, : 115 - +
  • [37] Dynamic Partitioning Based Scheduling of Real-Time Tasks in Multicore Processors
    Saranya, N.
    Hansdah, R. C.
    2015 IEEE 18th International Symposium on Real-Time Distributed Computing (ISORC), 2015, : 190 - 197
  • [38] Predictable Bus Arbitration Schemes for Heterogeneous Time-Critical Workloads Running on Multicore Processors
    Bourgade, Roman
    Rochange, Christine
    Sainrat, Pascal
    2011 IEEE 16TH CONFERENCE ON EMERGING TECHNOLOGIES AND FACTORY AUTOMATION (ETFA), 2011,
  • [39] Cache Utilization-Aware Scheduling for Multicore Processors
    Chu, Edward T. -H.
    Lu, Wen-wei
    2012 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS), 2012, : 368 - 371
  • [40] An Energy-Efficient Task Scheduling for Near Real-Time Systems on Heterogeneous Multicore Processors
    Nakada, Takashi
    Yanagihashi, Hiroyuki
    Imai, Kunimaro
    Ueki, Hiroshi
    Tsuchiya, Takashi
    Hayashikoshi, Masanori
    Nakamura, Hiroshi
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2020, E103D (02) : 329 - 338