Temperature dependence of ESD effects on 28 nm FD-SOI MOSFETs

被引:0
|
作者
Xiao, Yiping [1 ,2 ]
Liu, Chaoming [1 ,2 ]
Zhang, Yanqing [1 ]
Qi, Chunhua [1 ]
Ma, Guoliang [1 ]
Wang, Tianqi [1 ]
Huo, Mingxue [1 ]
机构
[1] Harbin Inst Technol, Lab Space Environm & Phys Sci, Harbin 150006, Peoples R China
[2] Harbin Inst Technol, Sch Mat Sci & Technol, Harbin, Peoples R China
基金
中国国家自然科学基金;
关键词
ambient temperatures; ESD effects; failure mechanisms; TCAD simulation; PROTECTION; DEVICES;
D O I
10.1002/eng2.12729
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
The failure mechanisms caused by electrostatic discharge (ESD) effects at ambient temperatures ranging from -75 to 125 & DEG;C are investigated by Silvaco TCAD simulator. The devices are NMOS transistors fabricated with 28 nm fully depleted silicon-on-insulator (FDSOI) technology. Results indicate that with an increase in temperature, the first breakdown voltage of the device decreased by 27.32%, while the holding voltage decreased by approximately 8.49%. The total current density, lattice temperature, potential, and so forth were extracted for a detailed insight into the failure process. These findings provide valuable references for the design and development of ESD protection devices applied at different temperature ranges.
引用
收藏
页数:9
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