A Hybrid Energy-Efficient, Area-Efficient, Low-Complexity Switching Scheme in SAR ADC for Biosensor Applications

被引:2
|
作者
Hu, Yunfeng [1 ]
Chen, Chaoyi [1 ]
Huang, Qingming [1 ]
Hu, Lexing [1 ]
Tang, Bin [1 ]
Hu, Mengsi [1 ]
Yuan, Bingbing [1 ]
Wu, Zhaohui [2 ]
Li, Bin [2 ]
机构
[1] Univ Elect Sci & Technol China, Zhongshan Inst, Zhongshan 528402, Peoples R China
[2] South China Univ Technol, Sch Microelect, Guangzhou 510640, Peoples R China
基金
中国国家自然科学基金;
关键词
SAR; low complexity; energy efficiency; area efficiency; capacitor splitting; monotonic; 10-BIT; CMOS;
D O I
10.3390/mi15010060
中图分类号
O65 [分析化学];
学科分类号
070302 ; 081704 ;
摘要
A hybrid energy-efficient, area-efficient, low-complexity switching scheme in SAR ADC for biosensor applications is proposed. This scheme is a combination of the monotonic technique, the MSB capacitor-splitting technique, and a new switching method. The MSB capacitor-splitting technique, as well as the reference voltage Vaq allow for more options for reference voltage conversion, resulting in higher area savings and higher energy efficiency. In a capacitor array, the circuit performs unilateral switching during all comparisons except for the second and last two comparisons, reducing the difficulty in designing the drive circuit. The proposed switching scheme saves 98.4% of the switching energy and reduces the number of unit capacitors by 87.5% compared to a conventional scheme. Furthermore, the SAR ADC employs low-noise and low-power dynamic comparators utilizing multi-clock control, low-sampling error-sampling switches based on the bootstrap technique, and dynamic SAR logic. The simulation results demonstrated that the proposed SAR ADC achieves 61.51 dB SNDR, 79.21 dB SFDR and consumes 0.278 mu W of power in a 180 nm process with a 1 V power supply, a full swing input signal frequency of 23.33 kHz, and a sampling rate of 100 kS/s.
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收藏
页数:21
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