Low power adiabatic logic based on FinFETs

被引：0

作者：

LIAO Nan ^{[1
]}

CUI XiaoXin ^{[1
]}

LIAO Kai ^{[1
]}

MA KaiSheng ^{[1
]}

WU Di ^{[1
]}

WEI Wei ^{[1
]}

LI Rui ^{[1
]}

YU DunShan ^{[1
]}

机构：

[1] Institute of Microelectronics,Peking University

来源：

Science China(Information Sciences) | 2014年 / 57卷 / 02期

关键词：

leakage power; FinFET; adiabatic logic; power reduction; limiting frequency;

D O I：

暂无

中图分类号：

TN386 [场效应器件];

学科分类号：

0805 ; 080501 ; 080502 ; 080903 ;

摘要：

With the aggressive scaling of device technology,the leakage power has become the main part of power consumption,which seriously reduces the energy recovery efciency of adiabatic logic.In this paper,a novel low-power adiabatic logic based on FinFET devices has been proposed.Due to the lower leakage current,higher on-state current and design flexibility of FinFETs,the proposed adiabatic logic shows considerable power reduction,performance improvement and area saving compared with CMOS adiabatic logic.An 8-state clock chain as the test circuit has been demonstrated based on the 32-nm FinFET Predictive Technology Model.The simulation results show that adiabatic circuit based on FinFET devices achieves a power reduction of up to84.8%and a limiting frequency of up to 55 GHz.

引用

页码：194 / 206

页数：13

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