A Full-System Approach to Multi-Valued Logic Design

被引:0
|
作者
Gutermann, Annina [1 ]
Becker, Juergen [1 ]
机构
[1] Karlsruhe Inst Technol KIT, Inst Informat Proc Technol ITIV, Karlsruhe, Germany
关键词
D O I
10.1109/ASAP61560.2024.00052
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In the evolving Beyond-Moore era, multi-valued logic (MVL) has the potential to extend existing binary systems and optimize circuit performance. The utilization of more than two logic levels enhances information density, resulting in reduced chip area and improved system performance. Emerging technologies might enable to combine MVL with in-memory computing (IMC) which then could serve as an in-memory multi-valued accelerator for data-intensive workloads. Previous approaches to MVL have been limited to isolated considerations of individual problems, often specific to ternary or quaternary implementations, and have not contextualized MVL approaches within the broader system. The integration of MVL within binary systems and the exploration of suitable electronic design automation (EDA) tools have not been adequately explored. Bridging the gap between stand-alone MVL approaches and integration into larger binary systems, we aim to achieve a "Full-System-View" for multi-valued logic incorporating a versatile range of logic values.
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页码:226 / 227
页数:2
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