BIPOLAR TRANSISTOR WITH SELF-ALIGNED LATERAL PROFILE.

被引:0
|
作者
Li, G.P. [1 ]
Chen, Tze-Chiang [1 ]
Chuang, Ching-Te [1 ]
Stork, Johannes M.C. [1 ]
Tang, Denny D. [1 ]
Ketchen, Mark B. [1 ]
Wang, Li-Kong [1 ]
机构
[1] IBM , Yorktown Heights, NY, USA, IBM , Yorktown Heights, NY, USA
来源
Electron device letters | 1987年 / EDL-8卷 / 08期
关键词
SEMICONDUCTOR DEVICES; MOS;
D O I
暂无
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
A self-alignment concept called the self-aligned lateral profile is presented for scaled-down bipolar transistors. Using this concept to form the impurity profile and combining it with a wraparound base contact to reduce the emitter-base contact spacing and with an n** plus -polyrefractory metal emitter stack to reduce the emitter resistance, a high-performance and potentially high-yield device structure can be obtained. The device structure can be adapted to a CMOS or merged bipolar-CMOS process and can also be easily optimized for analog applications.
引用
收藏
页码:338 / 340
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