Advantages of performing timing simulation

被引：0
|
作者：
Blunt, David [1 ]
机构：
[1] Parallel Systems Ltd, Surrey, United Kingdom
来源：
Electronic Engineering (London) | 2000年 / 72卷 / 886期
关键词：
Standard delay format - Timing analyzers - Timing simulation - Very high speed integrated circuits;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
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页码：9 / 10
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