Sub-1.3 nm amorphous tantalum pentoxide gate dielectrics for damascene metal gate transistors

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作者
Inumiya, Seiji [1 ]
Yagishita, Atsushi [1 ]
Saito, Tomohiro [1 ]
Hotta, Masaki [1 ]
Ozawa, Yoshio [1 ]
Suguro, Kyoichi [1 ]
Tsunashima, Yoshitaka [1 ]
Arikado, Tsunetoshi [1 ]
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[1] Microlectron. Engineering Laboratory, Semiconductor Company, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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| 1600年 / JJAP, Tokyo, Japan卷 / 39期
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