共 50 条
- [1] Automatic VHDL restructuring for RTL synthesis optimization and testability improvement INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1998, : 436 - 441
- [2] BDD-based testability estimation of VHDL designs EURO-DAC '96 - EUROPEAN DESIGN AUTOMATION CONFERENCE WITH EURO-VHDL '96 AND EXHIBITION, PROCEEDINGS, 1996, : 444 - 449
- [3] Fault coverage improving based on testability analysis of the VHDL code 2007 PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE ON THE EXPERIENCE OF DESIGNING AND APPLICATION OF CAD SYSTEMS IN MICROELECTRONICS, 2007, : 354 - +
- [4] VHDL testability analysis based on fault clustering and implicit fault injection PROCEEDINGS OF THE 8TH GREAT LAKES SYMPOSIUM ON VLSI, 1998, : 237 - 242
- [5] Improvement method for testability modeling with multiple faults Beijing Hangkong Hangtian Daxue Xuebao/Journal of Beijing University of Aeronautics and Astronautics, 2010, 36 (03): : 270 - 273
- [6] A novel High level testability synthesis method based on PSA ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 1249 - 1252
- [7] Fault injection for verifying testability at the VHDL level INTERNATIONAL TEST CONFERENCE 2003, PROCEEDINGS, 2003, : 131 - 137
- [8] Impact of the VHDL Description on the Testability of Integrated Systems Quality Engineering, 8 (04):
- [9] Testability improvement during high-level synthesis ATS 2003: 12TH ASIAN TEST SYMPOSIUM, PROCEEDINGS, 2003, : 505 - 505