LEVER. A logic extraction and verification program for MOS circuits

被引:0
|
作者
Wang, P.-H.P.
McNamee, L.
机构
关键词
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 50 条
  • [1] MULTILEVEL VERIFICATION OF MOS CIRCUITS
    WEISE, D
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1990, 9 (04) : 341 - 351
  • [2] COMPLEMENTARY DYNAMIC MOS LOGIC CIRCUITS
    VITTOZ, E
    OGUEY, H
    ELECTRONICS LETTERS, 1973, 9 (04) : 77 - 78
  • [3] Temporal logic in verification of digital circuits
    Kotmanova, Daniela
    JOURNAL OF ELECTRICAL ENGINEERING-ELEKTROTECHNICKY CASOPIS, 2008, 59 (01): : 14 - 22
  • [4] Program Verification with Separation Logic
    Iosif, Radu
    MODEL CHECKING SOFTWARE, SPIN 2018, 2018, 10869 : 48 - 62
  • [5] A DYNAMIC LOGIC FOR PROGRAM VERIFICATION
    HEISEL, M
    REIF, W
    STEPHAN, W
    LECTURE NOTES IN COMPUTER SCIENCE, 1989, 363 : 134 - 145
  • [6] A program logic for resource verification
    Aspinall, D
    Beringer, L
    Hofmann, M
    Loidl, HW
    Momigliano, A
    THEOREM PROVING IN HIGHER ORDER LOGICS, PROCEEDINGS, 2004, 3223 : 34 - 49
  • [7] Design of logic circuits on 5 nm MOS
    Chakraborty, Raktim
    Mandal, Jyotsna Kumar
    PHYSICA SCRIPTA, 2025, 100 (01)
  • [9] Logic Analysis and Verification of n-input Genetic Logic Circuits
    Baig, Hasan
    Madsen, Jan
    PROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2017, : 654 - 657
  • [10] Reversible Logic Based MOS Current Mode Logic Implementation in Digital Circuits
    Devi, S. Sharmila
    Bhanumathi, V
    CMC-COMPUTERS MATERIALS & CONTINUA, 2022, 70 (02): : 3609 - 3624