Novel flexible systolic mesh architecture for parallel VLSI implementation of finite digital convolution

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作者
Mohanty, B.K. [1 ]
Meher, P.K. [2 ]
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[1] Department of Physics, SKCG College, Paralakhemundi 761 200, India
[2] Dept. of Comp. Sci. and Application, Utkal University, Bhubaneswar 751 004, India
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IETE Journal of Research | / 44卷 / 06期
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页码:261 / 266
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